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| author | Michael Riesch <michael.riesch@wolfvision.net> | 2021-06-24 18:09:15 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-06-28 14:41:37 +0200 |
| commit | d30ef4e4bf8ebd6d8e857747647283acc0010153 (patch) | |
| tree | c13577bd5dd313873141f0dcac46f19bddf20507 | |
| parent | e41973dc6bfcb4986ccfbf5a2b8507215c477f1c (diff) | |
| download | barebox-d30ef4e4bf8ebd6d8e857747647283acc0010153.tar.gz barebox-d30ef4e4bf8ebd6d8e857747647283acc0010153.tar.xz | |
arm: rk3568-evb1: add support for Rockchip SARADC
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.barebox.org/20210624160915.21897-3-michael.riesch@wolfvision.net
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/dts/rk3568-evb1-v10.dts | 6 | ||||
| -rw-r--r-- | arch/arm/dts/rk3568.dtsi | 12 |
2 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts index 88aad40db9..bd583015e8 100644 --- a/arch/arm/dts/rk3568-evb1-v10.dts +++ b/arch/arm/dts/rk3568-evb1-v10.dts @@ -456,6 +456,11 @@ }; }; +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>; @@ -581,4 +586,3 @@ &combphy1_usq { status = "okay"; }; - diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi index 3baaec3a83..0f19d3f0c0 100644 --- a/arch/arm/dts/rk3568.dtsi +++ b/arch/arm/dts/rk3568.dtsi @@ -1030,6 +1030,18 @@ status = "disabled"; }; + saradc: saradc@fe720000 { + compatible = "rockchip,rk3568-saradc"; + reg = <0x0 0xfe720000 0x0 0x100>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + #io-channel-cells = <1>; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3568-pinctrl"; rockchip,grf = <&grf>; |