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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-06-22 19:51:11 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-06-24 10:17:09 +0200 |
commit | ddedd0ff5f6e5cae57229884ba2e3b5649afb172 (patch) | |
tree | 16867f8d5bcdbd7f1f987853cf8cd48cdc81ed92 | |
parent | 17423de8649345d3e41165d013e0ec28a35711bb (diff) | |
download | barebox-ddedd0ff5f6e5cae57229884ba2e3b5649afb172.tar.gz barebox-ddedd0ff5f6e5cae57229884ba2e3b5649afb172.tar.xz |
ARM: cpu: start: don't panic when only initial memory known
Boards that get their memory from device tree are prone to breakage if
upstream decides to remove the /memory node or renders it unusable[0]
or to disable the DRAM controller device node[1] used to dynamically
compute the size. While this needs to be fixed properly on a
case-by-case basis, soften the blow by using the memory size specified
by low level code as a fallback instead of just throwing the towel.
[0]: aa68c6bd3615 ("arm: rk3288-phycore-som: Fix memory node")
[1]: 0529149b2756 ("arm: imx8mq: re-enable DDRC for Barebox")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220622175111.2657673-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/cpu/mmu-common.c | 15 | ||||
-rw-r--r-- | arch/arm/cpu/start.c | 8 | ||||
-rw-r--r-- | arch/arm/include/asm/barebox-arm.h | 1 |
3 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/cpu/mmu-common.c b/arch/arm/cpu/mmu-common.c index 2ef1fa231f..488a189f1c 100644 --- a/arch/arm/cpu/mmu-common.c +++ b/arch/arm/cpu/mmu-common.c @@ -9,6 +9,7 @@ #include <dma.h> #include <mmu.h> #include <asm/system.h> +#include <asm/barebox-arm.h> #include <memory.h> #include "mmu.h" @@ -58,14 +59,24 @@ void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size) static int mmu_init(void) { - if (list_empty(&memory_banks)) + if (list_empty(&memory_banks)) { + resource_size_t start; + int ret; + /* * If you see this it means you have no memory registered. * This can be done either with arm_add_mem_device() in an * initcall prior to mmu_initcall or via devicetree in the * memory node. */ - panic("MMU: No memory bank found! Cannot continue\n"); + pr_emerg("No memory bank registered. Limping along with initial memory\n"); + + start = arm_mem_membase_get(); + ret = barebox_add_memory_bank("initmem", start, + arm_mem_endmem_get() - start); + if (ret) + panic(""); + } __mmu_init(get_cr() & CR_M); diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index c61db66865..14cc310312 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -28,6 +28,7 @@ unsigned long arm_stack_top; static unsigned long arm_barebox_size; static unsigned long arm_endmem; +static unsigned long arm_membase; static void *barebox_boarddata; static unsigned long barebox_boarddata_size; @@ -114,6 +115,12 @@ unsigned long arm_mem_endmem_get(void) } EXPORT_SYMBOL_GPL(arm_mem_endmem_get); +unsigned long arm_mem_membase_get(void) +{ + return arm_membase; +} +EXPORT_SYMBOL_GPL(arm_mem_membase_get); + static int barebox_memory_areas_init(void) { if(barebox_boarddata) @@ -148,6 +155,7 @@ __noreturn __no_sanitize_address void barebox_non_pbl_start(unsigned long membas pr_debug("memory at 0x%08lx, size 0x%08lx\n", membase, memsize); + arm_membase = membase; arm_endmem = endmem; arm_stack_top = arm_mem_stack_top(membase, endmem); arm_barebox_size = barebox_size; diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index 15b3b6c444..8240cce9bf 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -84,6 +84,7 @@ static inline void boarddata_create(void *adr, u32 machine) u32 barebox_arm_machine(void); unsigned long arm_mem_ramoops_get(void); +unsigned long arm_mem_membase_get(void); unsigned long arm_mem_endmem_get(void); struct barebox_arm_boarddata *barebox_arm_get_boarddata(void); |