diff options
| author | Lucas Stach <dev@lynxeye.de> | 2019-12-18 23:43:46 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-20 16:10:51 +0100 |
| commit | e93a34100c0e857db547d92dd8e5b027d197544b (patch) | |
| tree | 798e4fd86d5df8c475f2888ae798cb6c0c632c30 | |
| parent | 825708c9e80fa8be3d029703fdccee714cdd9169 (diff) | |
| download | barebox-e93a34100c0e857db547d92dd8e5b027d197544b.tar.gz barebox-e93a34100c0e857db547d92dd8e5b027d197544b.tar.xz | |
clk: zynq: add QSPI reference clock
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/clk/zynq/clkc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 30ca5a60fa..a6d8ba92ca 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c @@ -414,6 +414,9 @@ static int zynq_clock_probe(struct device_d *dev) clks[ddrpll] = zynq_pll_clk(ZYNQ_PLL_DDR, "ddr_pll", clk_base + 0x4); clks[iopll] = zynq_pll_clk(ZYNQ_PLL_IO, "io_pll", clk_base + 0x8); + zynq_periph_clk("lqspi_clk", clk_base + 0x4c); + clks[lqspi] = clk_gate("qspi0", "lqspi_clk", clk_base + 0x4c, 0, 0, 0); + zynq_periph_clk("sdio_clk", clk_base + 0x50); clks[sdio0] = clk_gate("sdio0", "sdio_clk", clk_base + 0x50, 0, 0, 0); clks[sdio1] = clk_gate("sdio1", "sdio_clk", clk_base + 0x50, 1, 0, 0); |