diff options
author | Lucas Stach <l.stach@pengutronix.de> | 2020-01-24 18:46:48 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-01-27 14:00:45 +0100 |
commit | ee8960aec018df2ded4ac28776243bda0b633d67 (patch) | |
tree | b0a50460faab93557271a07e7d94c19ef3eab817 | |
parent | 70fcc51b1066d69b7042035d64e797eea5e75d6c (diff) | |
download | barebox-ee8960aec018df2ded4ac28776243bda0b633d67.tar.gz barebox-ee8960aec018df2ded4ac28776243bda0b633d67.tar.xz |
ARM: imx6: properly check for IPU presence
Since a73850bd76d0 (ARM: imx: disable IPU QoS setup for correct SoCs), which
fixed the condition to not execute the IPU QoS fixups on SoCs that don't have
a IPU, the fixups aren't applied on i.MX6Q/DP anymore, since those SoCs were
missing from the whitelist.
Add a function to make it a bit more clearer what we are checking here and add
the Q/DP SoCs.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/mach-imx/imx6.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 41e0066add..e1c8214568 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -114,14 +114,23 @@ static void imx6_init_lowlevel(void) } } +static bool imx6_has_ipu(void) +{ + if (cpu_mx6_is_mx6qp() || cpu_mx6_is_mx6dp() || + cpu_mx6_is_mx6q() || cpu_mx6_is_mx6d() || + cpu_mx6_is_mx6dl() || cpu_mx6_is_mx6s()) + return true; + + return false; +} + static void imx6_setup_ipu_qos(void) { void __iomem *iomux = (void *)MX6_IOMUXC_BASE_ADDR; void __iomem *fast2 = (void *)MX6_FAST2_BASE_ADDR; uint32_t val; - if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() && - !cpu_mx6_is_mx6dl() && !cpu_mx6_is_mx6s()) + if (!imx6_has_ipu()) return; val = readl(iomux + IOMUXC_GPR4); |