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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:26 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-19 08:56:26 +0200 |
| commit | f1fd0e4c5407fa6336afb773dae9ceca0cb873b1 (patch) | |
| tree | 3a5e718cbd40deacc0136aded2ba771c080e4924 | |
| parent | 355884b413b1c2546c04e397d6a480efb27ae811 (diff) | |
| download | barebox-f1fd0e4c5407fa6336afb773dae9ceca0cb873b1.tar.gz barebox-f1fd0e4c5407fa6336afb773dae9ceca0cb873b1.tar.xz | |
dts: update to v5.3-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | dts/src/riscv/sifive/fu540-c000.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/dts/src/riscv/sifive/fu540-c000.dtsi b/dts/src/riscv/sifive/fu540-c000.dtsi index 9bf63f0ab2..42b5ec2231 100644 --- a/dts/src/riscv/sifive/fu540-c000.dtsi +++ b/dts/src/riscv/sifive/fu540-c000.dtsi @@ -21,7 +21,6 @@ cpus { #address-cells = <1>; #size-cells = <0>; - timebase-frequency = <1000000>; cpu0: cpu@0 { compatible = "sifive,e51", "sifive,rocket0", "riscv"; device_type = "cpu"; |