path: root/COPYING
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authorAhmad Fatoum <>2020-01-17 19:17:16 +0100
committerSascha Hauer <>2020-01-20 08:53:19 +0100
commit70fcc51b1066d69b7042035d64e797eea5e75d6c (patch)
tree2a9b44b06b9176cee4710c0bdb9de84d8e255ec6 /COPYING
parent6745b22a18733425fd0b9d28c744cdc414a8d7a9 (diff)
net: designware: eqos: don't funnel all MDIO writes to register 0HEADmaster
eqos_mdio_write ended up using the addr parameter instead of the computed miiaddr variable, which would've factored in the reg parameter. This had the effect that all writes went to PHY register 0, which was fine as long as there were only register 0 writes. As soon there are more writes, e.g. because a PHY driver was enabled, register 0 became clobbered and erratic behavior ensued. Fix the typo and while at it rename the val parameter to a more descriptive name. Fixes: a4f709bbb ("net: add Designware Ethernet QoS for STM32MP") Signed-off-by: Ahmad Fatoum <> Signed-off-by: Sascha Hauer <>
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