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authorHolger Schurig <holgerschurig@gmail.com>2014-06-27 13:00:19 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-06-27 21:46:59 +0200
commit7d8c09a630060328d65c0a18cc034402475efc63 (patch)
treea47d50283bdbda712dfe24d71272fbf3a3478d7a /Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst
parent4845d8e3544bb7cfeadb5a4a2aec095c66f55f2a (diff)
downloadbarebox-7d8c09a630060328d65c0a18cc034402475efc63.tar.gz
barebox-7d8c09a630060328d65c0a18cc034402475efc63.tar.xz
doc: reformat overly long lines
Lines over 120 are just too long :-) Signed-off-by: Holger Schurig <holgerschurig@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst')
-rw-r--r--Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst9
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst b/Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst
index 1ea008f08e..45fd6be576 100644
--- a/Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst
+++ b/Documentation/boards/imx/Phytec-phyCORE-i.MX31.rst
@@ -6,7 +6,8 @@ The CPU module
http://www.phytec.eu/europe/products/modules-overview/phycore/produktdetails/p/phycore-imx31-2.html
-This CPU card is based on a Freescale i.MX31 CPU. The card in configuration -0000REU is shipped with:
+This CPU card is based on a Freescale i.MX31 CPU. The card in
+configuration -0000REU is shipped with:
* 128 MiB synchronous dynamic RAM (DDR type)
* 64 MiB NAND flash
@@ -33,6 +34,8 @@ Build the binary image::
make ARCH=arm CROSS_COMPILE=armv5compiler
-**NOTE:** replace ''armv5compiler'' with your ARM v5 cross compiler, e.g.: ''arm-1136jfs-linux-gnueabi-''
+**NOTE:** replace ''armv5compiler'' with your ARM v5 cross compiler,
+ e.g.: ''arm-1136jfs-linux-gnueabi-''
-The resulting binary image to be flashed will be barebox.bin, whereas the file named just barebox is an ELF executable for ARM.
+The resulting binary image to be flashed will be barebox.bin, whereas
+the file named just barebox is an ELF executable for ARM.