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authorJuergen Borleis <jbe@pengutronix.de>2015-06-19 14:23:47 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2015-06-22 07:22:27 +0200
commit2274edbb341391ee5f5b72cbd35999a35f0cb96e (patch)
tree92bb3575e36b59cc4f0780402d45072754138478 /Documentation/user
parentb99fcfa6b1c24433c45aff1ee2e3d7e2e279b786 (diff)
downloadbarebox-2274edbb341391ee5f5b72cbd35999a35f0cb96e.tar.gz
barebox-2274edbb341391ee5f5b72cbd35999a35f0cb96e.tar.xz
Documentation: fix spelling
Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'Documentation/user')
-rw-r--r--Documentation/user/system-reset.rst2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/user/system-reset.rst b/Documentation/user/system-reset.rst
index c2ee40978b..8ff39634ab 100644
--- a/Documentation/user/system-reset.rst
+++ b/Documentation/user/system-reset.rst
@@ -49,7 +49,7 @@ But there are some drawbacks within this simple approach.
currently used clock speeds. But don't rely on it.
To workaround these issues the reset signal triggered by a SoC internal source
-must be 'visible' to the external devices to also reset them like a real POR do.
+must be 'visible' to the external devices to also reset them like a real POR does.
But many SoCs do not provide such a signal. So you can't use the internal reset
source if you face one of the above listed issues!