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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2021-03-22 14:39:13 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-03-23 12:16:26 +0100 |
commit | 22a41fca64e1184ccc954a23bb75e7dc0614670c (patch) | |
tree | 7b3ac405ae1825be57428f2fd89504993d04247d /Documentation | |
parent | 410544558f35542dbcd07ebf0c8fb09d7e844a93 (diff) | |
download | barebox-22a41fca64e1184ccc954a23bb75e7dc0614670c.tar.gz barebox-22a41fca64e1184ccc954a23bb75e7dc0614670c.tar.xz |
RISC-V: erizo: migrate to PBL
We now have everything in place to migrate erizo to PBL.
As currently, this is the only board, we can drop all non-PBL support
in the same go.
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/boards/riscv.rst | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/Documentation/boards/riscv.rst b/Documentation/boards/riscv.rst index c7fa52aadb..a1f7e30531 100644 --- a/Documentation/boards/riscv.rst +++ b/Documentation/boards/riscv.rst @@ -1,8 +1,11 @@ RISC-V ====== -Running RISC-V barebox on qemu ------------------------------- +Erizo +----- + +Running on qemu +~~~~~~~~~~~~~~~ Obtain RISC-V GCC/Newlib Toolchain, see https://github.com/riscv/riscv-tools/blob/master/README.md @@ -44,7 +47,7 @@ Next compile barebox:: Run barebox:: $ <path to riscv-qemu source>/riscv32-softmmu/qemu-system-riscv32 \ - -nographic -M erizo -bios <path to barebox sources >/barebox.bin \ + -nographic -M erizo -bios ./images/barebox-erizo-generic.img \ -serial stdio -monitor none -trace file=/dev/null Switch to console [cs0] @@ -59,8 +62,8 @@ Run barebox:: barebox:/ -Running RISC-V barebox on DE0-Nano FPGA board ---------------------------------------------- +Running on DE0-Nano FPGA board +------------------------------ See https://github.com/open-design/riscv-soc-cores/ for instructions on DE0-Nano bitstream generation and loading. |