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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-07-09 08:21:06 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-07-09 08:21:06 +0200 |
commit | 1073955aa5fb777381de710ad314cdbf68fef189 (patch) | |
tree | 8991e01bd8ed34c6fd74a110b691727eb4382524 /Documentation | |
parent | 47d229d5c0fc626707101f0ad6c653ee68a65616 (diff) | |
parent | 0fd30cd29b5838b048ed59cc018a74d858567f21 (diff) | |
download | barebox-1073955aa5fb777381de710ad314cdbf68fef189.tar.gz barebox-1073955aa5fb777381de710ad314cdbf68fef189.tar.xz |
Merge branch 'for-next/imx8mq'
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/boards/imx.rst | 13 | ||||
-rw-r--r-- | Documentation/boards/imx/nxp-imx8mq-evk.rst | 116 |
2 files changed, 128 insertions, 1 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index b3002badf1..db889ee702 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@ -21,6 +21,7 @@ The Internal Boot Mode is supported on: * i.MX53 * i.MX6 * i.MX7 +* i.MX8MQ With the Internal Boot Mode, the images contain a header which describes where the binary shall be loaded and started. These headers also contain @@ -44,6 +45,15 @@ of the image to the card, use:: dd if=images/barebox-freescale-imx51-babbage.img of=/dev/sdd bs=1024 skip=1 seek=1 +NOTE: MaskROM on i.MX8 expects image to start at +33KiB mark, so the +following command has to be used instead: + + dd if=images/barebox-nxp-imx8mq-evk.img of=/dev/sdd bs=1024 skip=33 seek=33 + +Or, in case of NAND: + + dd if=images/barebox-nxp-imx8mq-evk.img of=/dev/nand bs=1024 skip=33 seek=1 + The images can also always be started second stage:: bootm /mnt/tftp/barebox-freescale-imx51-babbage.img @@ -59,7 +69,8 @@ options in this file are: Header: +----------------+--------------------------------------------------------------+ -| soc <soctype> | soctype can be one of imx35, imx51, imx53, imx6, imx7, vf610 | +| soc <soctype> |soctype can be one of imx35, imx51, imx53, imx6, imx7, vf610, | +| | imx8mq | +----------------+--------------------------------------------------------------+ | loadaddr <adr> | The address the binary is uploaded to | +----------------+--------------------------------------------------------------+ diff --git a/Documentation/boards/imx/nxp-imx8mq-evk.rst b/Documentation/boards/imx/nxp-imx8mq-evk.rst new file mode 100644 index 0000000000..9dfa911bec --- /dev/null +++ b/Documentation/boards/imx/nxp-imx8mq-evk.rst @@ -0,0 +1,116 @@ +NXP i.MX8MQ EVK Evaluation Board +================================ + +Board comes with: + +* 3GiB of LPDDR4 RAM +* 16GiB eMMC + +Not including booting via serial, the device can boot from either SD or eMMC. + +Downloading DDR PHY Firmware +---------------------------- + +As a part of DDR intialization routine NXP i.MX8MQ EVK requires and +uses several binary firmware blobs that are distributed under a +separate EULA and cannot be included in Barebox. In order to obtain +the do the following:: + + wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.2.bin + chmod +x firmware-imx-7.2.bin + ./firmware-imx-7.2.bin + +Executing that file should produce a EULA acceptance dialog as well as +result in the following files: + +- lpddr4_pmu_train_1d_dmem.bin +- lpddr4_pmu_train_1d_imem.bin +- lpddr4_pmu_train_2d_dmem.bin +- lpddr4_pmu_train_2d_imem.bin + +As a last step of this process those files need to be placed in +"firmware/imx/":: + + for f in lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin; \ + do \ + cp firmware-imx-7.2/firmware/ddr/synopsys/${f} \ + firmware/imx/${f}; \ + done + +DDR Configuration Code +====================== + +The following two files: + + - ddr_init.c + - ddrphy_train.c + +were obtained by running i.MX 8M DDR Tool that can be found here: + +https://community.nxp.com/docs/DOC-340179 + +Only minimal amount of necessary changes were made to those files. +All of the "impedance matching" code is located in "ddr.h". + +Build Barebox +============= + + make imx_v8_defconfig + make + +Boot Configuration +================== + +The NXM i.MX8MQ EVK Evaluation Board has two switches responsible for +configuring bootsource/boot mode: + + * SW802 for selecting appropriate BMOD + * SW801 for selecting appropriate boot medium + +In order to select internal boot set SW802 as follows:: + + +-----+ + | | + | O | | <--- on = high level + | | | | + | | O | <--- off = low level + | | + | 1 2 | + +-----+ + +Bootsource is the internal eMMC:: + + +---------+ + | | + | | | O | | + | | | | | | <---- eMMC + | O O O O | + | | + | 1 2 3 4 | + +---------+ + +Bootsource is the SD2 slot:: + + +---------+ + | | + | O O | | | + | | | | | | <---- SD2 + | | | O O | + | | + | 1 2 3 4 | + +---------+ + + +Serial boot SW802 setting needed for i.MX8 DDR Tool is as follows:: + + +-----+ + | | + | | O | <--- on = high level + | | | | + | O | | <--- off = low level + | | + | 1 2 | + +-----+
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