Merge branch 'for-next/imx'

2 files changed, 89 insertions, 0 deletions

diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
index 887b45c708..4ce9d9808c 100644
--- a/Documentation/boards/imx.rst
+++ b/Documentation/boards/imx.rst
@@ -83,6 +83,35 @@ The images can also always be started as second stage on the target:
 
   barebox@Board Name:/ bootm /mnt/tftp/barebox-freescale-imx51-babbage.img
 
+BootROM Reboot mode codes (bmode)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+For select SoCs, barebox supports communicating an alternative boot medium
+that BootROM should select after a warm reset::
+
+  barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode
+  Driver: syscon-reboot-mode
+  Bus: platform
+  Parent: 30390000.reset-controller@30390000.of
+  Parameters:
+    next: normal (type: enum) (values: "normal", "serial")
+    prev: normal (type: enum) (values: "normal", "serial")
+  Device node: /soc@0/bus@30000000/reset-controller@30390000/reboot-mode
+  reboot-mode {
+          compatible = "barebox,syscon-reboot-mode";
+          offset = <0x94 0x98>;
+          mask = <0xffffffff 0x40000000>;
+          mode-normal = <0x0 0x0>;
+          mode-serial = <0x10 0x40000000>;
+  };
+
+  barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -r imxwd-warm
+
+This will cause barebox to fall into serial download mode on an i.MX8MM.
+
+Different SoCs may have more possible reboot modes available.
+See the section on :ref:`Reboot modes<reboot_mode>` for more information.
+
 High Assurance Boot
 ^^^^^^^^^^^^^^^^^^^
 
diff --git a/Documentation/boards/imx/nxp-imx8mn-evk.rst b/Documentation/boards/imx/nxp-imx8mn-evk.rst
new file mode 100644
index 0000000000..44cd0c68e4
--- /dev/null
+++ b/Documentation/boards/imx/nxp-imx8mn-evk.rst
@@ -0,0 +1,60 @@
+NXP i.MX8MN EVK Evaluation Board
+================================
+
+Board comes with either:
+
+* 2GiB of LPDDR4 RAM
+* 2GiB of DDR4 RAM
+
+barebox supports both variants with the same image.
+
+Downloading DDR PHY Firmware
+----------------------------
+
+As a part of DDR intialization routine NXP i.MX8MN EVK requires and
+uses several binary firmware blobs that are distributed under a
+separate EULA and cannot be included in Barebox. In order to obtain
+them do the following::
+
+ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.12.bin
+ chmod +x firmware-imx-8.12.bin
+ ./firmware-imx-8.12.bin
+
+Executing that file should produce a EULA acceptance dialog as well as
+result in the following files:
+
+- lpddr4_pmu_train_1d_dmem.bin
+- lpddr4_pmu_train_1d_imem.bin
+- lpddr4_pmu_train_2d_dmem.bin
+- lpddr4_pmu_train_2d_imem.bin
+- ddr4_dmem_1d_201810.bin
+- ddr4_imem_1d_201810.bin
+- ddr4_dmem_2d_201810.bin
+- ddr4_imem_2d_201810.bin
+
+As a last step of this process those files need to be placed in
+"firmware/"::
+
+  for f in lpddr4_pmu_train_1d_dmem.bin  \
+           lpddr4_pmu_train_1d_imem.bin  \
+	   lpddr4_pmu_train_2d_dmem.bin  \
+	   lpddr4_pmu_train_2d_imem.bin; \
+  do \
+	   cp firmware-imx-8.0/firmware/ddr/synopsys/${f} \
+	      firmware/${f}; \
+  done
+
+  for f in ddr4_dmem_1d_201810.bin  \
+           ddr4_imem_1d_201810.bin  \
+           ddr4_dmem_2d_201810.bin  \
+           ddr4_imem_2d_201810.bin; \
+  do \
+	   cp firmware-imx-8.0/firmware/ddr/synopsys/${f} \
+	      firmware/${f%_201810.bin}.bin; \
+  done
+
+Build barebox
+=============
+
+ make imx_v8_defconfig
+ make