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authorSascha Hauer <s.hauer@pengutronix.de>2014-10-02 08:54:41 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-10-02 08:54:41 +0200
commitd0064495d3325cb630bc79550d60a4f4eef57e31 (patch)
tree0011e3237f2501588bc37b286253764a3e855b3c /Documentation
parent13f1dedaeea0077554111a0075eeb24f66ceacbd (diff)
parentd0a0e807ab4449aec068b1e86dac85b687f93ea5 (diff)
downloadbarebox-d0064495d3325cb630bc79550d60a4f4eef57e31.tar.gz
barebox-d0064495d3325cb630bc79550d60a4f4eef57e31.tar.xz
Merge branch 'for-next/firmware'
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/firmware/altr,passive-serial.txt24
-rw-r--r--Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt19
2 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt b/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt
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index 0000000000..d357dd39cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt
@@ -0,0 +1,24 @@
+Altera FPGAs in passive serial mode
+-----------------------------------
+
+This binding defines the control interface to Altera FPGAs in
+passive serial mode. This is used to upload the firmware and
+to start the FPGA.
+
+Required properties:
+- compatible: shall be "altr,fpga-passive-serial"
+- reg: SPI chip select
+- nstat-gpios: Specify GPIO for controlling the nstat pin
+- confd-gpios: Specify GPIO for controlling the confd pin
+- nconfig-gpios: Specify GPIO for controlling the nconfig pin
+
+Example:
+
+ fpga@0 {
+ compatible = "altr,fpga-passive-serial";
+ nstat-gpios = <&gpio4 18 0>;
+ confd-gpios = <&gpio4 19 0>;
+ nconfig-gpios = <&gpio4 20 0>;
+ spi-max-frequency = <10000000>;
+ reg = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt b/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt
new file mode 100644
index 0000000000..70ec4abf25
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt
@@ -0,0 +1,19 @@
+Altera SOCFPGA FPGA Manager
+---------------------------
+
+This binding defines the FPGA Manager on Altera SOCFPGAs. This is used to upload
+the firmware to the FPGA part of the SoC.
+
+Required properties:
+- compatible: shall be "altr,socfpga-fpga-mgr"
+- reg: Must contain 2 register ranges:
+ 1. The control address space of the FPGA manager.
+ 2. The configuration data address space where the firmware data is written to.
+
+Example:
+
+ fpgamgr@ff706000 {
+ compatible = "altr,socfpga-fpga-mgr";
+ reg = <0xff706000 0x1000>,
+ <0xffb90000 0x1000>;
+ };