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authorSascha Hauer <s.hauer@pengutronix.de>2020-07-27 21:58:31 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-07-27 21:58:31 +0200
commitd0dee07167826c6b6b1e85d8ef861e386bd0b300 (patch)
tree61d039259ff696067a875b98a90192af418bbaa7 /Documentation
parent043f7572841d4cec3855cca02e538825d159d070 (diff)
parent0fc1b594a23a99ebfb3b1ee035711af4fc36ea86 (diff)
downloadbarebox-d0dee07167826c6b6b1e85d8ef861e386bd0b300.tar.gz
barebox-d0dee07167826c6b6b1e85d8ef861e386bd0b300.tar.xz
Merge branch 'for-next/imx'
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/boards/imx.rst2
-rw-r--r--Documentation/boards/imx/nxp-imx8mp-evk.rst65
2 files changed, 66 insertions, 1 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
index 8fe0a2828d..887b45c708 100644
--- a/Documentation/boards/imx.rst
+++ b/Documentation/boards/imx.rst
@@ -252,7 +252,7 @@ Header:
+--------------------+--------------------------------------------------------------+
| ``loadaddr <adr>`` | The address the binary is uploaded to |
+--------------------+--------------------------------------------------------------+
-| ``dcdofs <ofs>`` | The offset of the image header in the image. This should be: |
+| ``ivtofs <ofs>`` | The offset of the image header in the image. This should be: |
| | |
| | * ``0x400``: MMC/SD, NAND, serial ROM, PATA, SATA |
| | * ``0x1000``: NOR Flash |
diff --git a/Documentation/boards/imx/nxp-imx8mp-evk.rst b/Documentation/boards/imx/nxp-imx8mp-evk.rst
new file mode 100644
index 0000000000..fec366e0de
--- /dev/null
+++ b/Documentation/boards/imx/nxp-imx8mp-evk.rst
@@ -0,0 +1,65 @@
+NXP i.MX8MP-EVK board
+=====================
+
+The board comes with:
+
+* 6GiB of LPDDR4 RAM
+* 32GiB eMMC
+
+Not including booting via serial, the device can boot from either SD or eMMC.
+
+Downloading DDR PHY firmware
+----------------------------
+
+As a part of DDR intialization routine NXP i.MX8MQ EVK requires and
+uses several binary firmware blobs that are distributed under a
+separate EULA and cannot be included in Barebox. In order to obtain
+them do the following::
+
+ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin
+ chmod +x firmware-imx-8.7.bin
+ ./firmware-imx-8.7.bin
+
+Executing that file should produce a EULA acceptance dialog as well as
+result in the following files:
+
+- lpddr4_pmu_train_1d_dmem.bin
+- lpddr4_pmu_train_1d_imem.bin
+- lpddr4_pmu_train_2d_dmem.bin
+- lpddr4_pmu_train_2d_imem.bin
+
+As a last step of this process those files need to be placed in
+"firmware/"::
+
+ for f in lpddr4_pmu_train_1d_dmem.bin \
+ lpddr4_pmu_train_1d_imem.bin \
+ lpddr4_pmu_train_2d_dmem.bin \
+ lpddr4_pmu_train_2d_imem.bin; \
+ do \
+ cp firmware-imx-8.7/firmware/ddr/synopsys/${f} \
+ firmware/${f}; \
+ done
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Get ATF from https://source.codeaurora.org/external/imx/imx-atf, branch
+imx_5.4.3_2.0.0::
+
+ make PLAT=imx8mp bl31
+ cp build/imx8mp/release/bl31.bin ${barebox_srctree}/imx8mp-bl31.bin
+
+Build Barebox
+-------------
+
+i.MX8MP-EVK support is contained in the imx_v8_defconfig to build it use::
+
+ make imx_v8_defconfig
+ make
+
+Boot Configuration
+------------------
+
+The NXP i.MX8MP-EVK board has four switches responsible for configuring
+bootsource/boot mode. The settings for the different boot sources are
+printed on the board.