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authorMarc Kleine-Budde <mkl@pengutronix.de>2009-12-07 12:40:11 +0100
committerMarc Kleine-Budde <mkl@pengutronix.de>2009-12-09 18:08:09 +0100
commit44b677b31c3b993ad1191f8e80c74b6b39fb7158 (patch)
tree3cd4e55de6af2ee40f02e2628ec58f0af15d0194 /Makefile
parent6dc5be9a1679adcd95f1d3c091b528b3cf9f5ba8 (diff)
downloadbarebox-44b677b31c3b993ad1191f8e80c74b6b39fb7158.tar.gz
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start-arm: disable I-cache
<HACK> For some yet unknown reason the processor on the i.MX35 3stack board (at least on our board) has problem with an activated instruction cache and booting from NAND: The copy-from-NFC-RAM-to-SDRAM routine doesn't loop. It looks basically like this: 1: ldmia stmia cmp ble 1b If the "cmp" instruction lives on address 0xbb000640 it doesn't work with an activated i-cache. The processor flags are not properly updated. So the ble won't jump back. This obviously break booting from nand. This is why this patch disables the i-cache. </HACK> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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