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authorSascha Hauer <s.hauer@pengutronix.de>2017-02-06 16:11:03 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-02-13 08:35:42 +0100
commitcc407b41135d4a427dfb09fb6e32b831e6c98a31 (patch)
tree0ba793b8a0c041819e4409f0c31b2d4f297c997a /arch/arm/Kconfig
parentcdf33e6ecf4ca724d8be64fefbc4896eb8baf046 (diff)
downloadbarebox-cc407b41135d4a427dfb09fb6e32b831e6c98a31.tar.gz
barebox-cc407b41135d4a427dfb09fb6e32b831e6c98a31.tar.xz
ARM: Add PSCI support
This patch contains the barebox implementation for the ARM "Power State Coordination Interface" (PSCI). The interface is aimed at the generalization of code in the following power management scenarios: * Core idle management. * Dynamic addition and removal of cores, and secondary core boot. * big.LITTLE migration. * System shutdown and reset. In practice, all that's currently implemented is a way to enable the secondary core one some SoCs. With PSCI the Kernel is either started in nonsecure or in Hypervisor mode and PSCI is used to apply power to the secondary cores. The start mode is passed in the global.bootm.secure_state variable. This enum can contain "secure" (Kernel is started in secure mode, means no PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available) or "hyp" (Kernel is started in hyp mode, meaning it can support virtualization). We currently only support putting the secure monitor code into SDRAM, which means we always steal some amount of memory from the Kernel. To keep things simple for now we simply keep the whole barebox binary in memory The PSCI support has been tested on i.MX7 only so far. The only supported operations are CPU_ON and CPU_OFF. The PSCI and secure monitor code is based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3e8ccf7661..e4663ea268 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -383,6 +383,29 @@ config ARM_SEMIHOSTING
the data on the host computer connected to the target via
debugging channel (JTAG, SWD). If unsure say N
+config ARM_SECURE_MONITOR
+ bool
+
+config ARM_PSCI
+ bool "enable Power State Coordination Interface (PSCI) support"
+ depends on CPU_V7
+ select ARM_SECURE_MONITOR
+ help
+ PSCI is used for controlling secondary CPU cores on some systems. Say
+ yes here if you have one of these.
+
+config ARM_PSCI_DEBUG
+ bool "Enable PSCI debugging"
+ depends on ARM_PSCI
+ help
+ This enables debug output from the PSCI functions during runtime of the
+ Kernel. This needs board specific help, the board needs to provide a putc
+ function using psci_set_putc(). This putc function will then be called
+ during runtime of the Kernel, so it must be able to cope with that. It may
+ happen for example that the Kernel has turned off some clocks needed in the
+ putc function.
+ Only use for debugging.
+
endmenu
source common/Kconfig