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authorLucas Stach <dev@lynxeye.de>2015-03-01 17:08:54 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-03-02 07:30:55 +0100
commitf8d5736939551cd6aaf7f2926999703fea6d2620 (patch)
treec4b728db6092c6dfe9cf9b16427d2f937159dd14 /arch/arm/Kconfig
parent02972681acea32220c2bebe7e4024712bb75f3e0 (diff)
downloadbarebox-f8d5736939551cd6aaf7f2926999703fea6d2620.tar.gz
barebox-f8d5736939551cd6aaf7f2926999703fea6d2620.tar.xz
ARM: Kconfig: remove stale option CPU_V7_DCACHE_SKIP
I stumbled across this option a few times already and always found it to be at least confusing when and why it should be enabled. Since commit b7451329b5d2 (ARM: OMAP3: invalidate L2 cache using ROM API) it is actually unused and only adds confusion. Better remove it. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f682803bf1..9b6c626dfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -298,14 +298,6 @@ endmenu
menu "ARM specific settings"
-config CPU_V7_DCACHE_SKIP
- bool "Skip DCache Invalidate"
- depends on CPU_V7
- default n
- help
- If your architecture configuration uses some other method of disabling caches, enable this
- So that the D-Cache invalidation logic is skipped
-
config ARM_OPTIMZED_STRING_FUNCTIONS
bool "use assembler optimized string functions"
help