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authorJuergen Beisert <jbe@pengutronix.de>2012-01-02 12:44:02 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2012-01-02 13:32:14 +0100
commit3ee217a69c7341efd44f8d0b5e8c0d0f154b071a (patch)
treea269d95a42a61aa7aa0aa4569c50688fb1cab6f8 /arch/arm/boards/a9m2440
parent59994faae6162e0e29a0add7cd24023eac0c9580 (diff)
downloadbarebox-3ee217a69c7341efd44f8d0b5e8c0d0f154b071a.tar.gz
barebox-3ee217a69c7341efd44f8d0b5e8c0d0f154b071a.tar.xz
MACH SAMSUNG/S3C: Re-work the GPIO handling for S3C24xx CPUs
a) use the more CPU specific S3C* macro names b) move the register description out of the way, as more recent CPUs using a different layout and more features Signed-off-by: Juergen Beisert <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/a9m2440')
-rw-r--r--arch/arm/boards/a9m2440/a9m2410dev.c53
-rw-r--r--arch/arm/boards/a9m2440/a9m2440.c5
-rw-r--r--arch/arm/boards/a9m2440/lowlevel_init.S3
3 files changed, 32 insertions, 29 deletions
diff --git a/arch/arm/boards/a9m2440/a9m2410dev.c b/arch/arm/boards/a9m2440/a9m2410dev.c
index 1da69eb814..bedb0f7590 100644
--- a/arch/arm/boards/a9m2440/a9m2410dev.c
+++ b/arch/arm/boards/a9m2440/a9m2410dev.c
@@ -30,6 +30,7 @@
#include <io.h>
#include <mach/s3c-iomap.h>
#include <mach/s3c-busctl.h>
+#include <mach/s3c24xx-gpio.h>
/**
* Initialize the CPU to be able to work with the a9m2410dev evaluation board
@@ -39,38 +40,38 @@ int a9m2410dev_devices_init(void)
unsigned int reg;
/* ---------- configure the GPIOs ------------- */
- writel(0x007FFFFF, GPACON);
- writel(0x00000000, GPCCON);
- writel(0x00000000, GPCUP);
- writel(0x00000000, GPDCON);
- writel(0x00000000, GPDUP);
- writel(0xAAAAAAAA, GPECON);
- writel(0x0000E03F, GPEUP);
- writel(0x00000000, GPBCON); /* all inputs */
- writel(0x00000007, GPBUP); /* pullup disabled for GPB0..3 */
- writel(0x00009000, GPFCON); /* GPF7 CLK_INT#, GPF6 Debug-LED */
- writel(0x000000FF, GPFUP);
- writel(readl(GPGDAT) | 0x1010, GPGDAT); /* switch off IDLE_SW#, switch off LCD backlight */
- writel(0x0100A93A, GPGCON); /* switch on USB device */
- writel(0x0000F000, GPGUP);
- writel(0x0029FAAA, GPHCON);
+ writel(0x007FFFFF, S3C_GPACON);
+ writel(0x00000000, S3C_GPCCON);
+ writel(0x00000000, S3C_GPCUP);
+ writel(0x00000000, S3C_GPDCON);
+ writel(0x00000000, S3C_GPDUP);
+ writel(0xAAAAAAAA, S3C_GPECON);
+ writel(0x0000E03F, S3C_GPEUP);
+ writel(0x00000000, S3C_GPBCON); /* all inputs */
+ writel(0x00000007, S3C_GPBUP); /* pullup disabled for GPB0..3 */
+ writel(0x00009000, S3C_GPFCON); /* GPF7 CLK_INT#, GPF6 Debug-LED */
+ writel(0x000000FF, S3C_GPFUP);
+ writel(readl(S3C_GPGDAT) | 0x1010, S3C_GPGDAT); /* switch off IDLE_SW#, switch off LCD backlight */
+ writel(0x0100A93A, S3C_GPGCON); /* switch on USB device */
+ writel(0x0000F000, S3C_GPGUP);
+ writel(0x0029FAAA, S3C_GPHCON);
- writel((1 << 12) | (0 << 11), GPJDAT);
- writel(0x0016aaaa, GPJCON);
- writel(~((0<<12)| (1<<11)), GPJUP);
+ writel((1 << 12) | (0 << 11), S3C_GPJDAT);
+ writel(0x0016aaaa, S3C_GPJCON);
+ writel(~((0<<12)| (1<<11)), S3C_GPJUP);
- writel((0 << 12) | (0 << 11), GPJDAT);
- writel(0x0016aaaa, GPJCON);
- writel(0x00001fff, GPJUP);
+ writel((0 << 12) | (0 << 11), S3C_GPJDAT);
+ writel(0x0016aaaa, S3C_GPJCON);
+ writel(0x00001fff, S3C_GPJUP);
- writel(0x00000000, DSC0);
- writel(0x00000000, DSC1);
+ writel(0x00000000, S3C_DSC0);
+ writel(0x00000000, S3C_DSC1);
/*
* USB port1 normal, USB port0 normal, USB1 pads for device
* PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1,
*/
- writel((readl(MISCCR) & ~0xFFFF) | 0x0140, MISCCR);
+ writel((readl(S3C_MISCCR) & ~0xFFFF) | 0x0140, S3C_MISCCR);
/* ----------- configure the access to the outer space ---------- */
reg = readl(S3C_BWSCON);
@@ -88,9 +89,9 @@ int a9m2410dev_devices_init(void)
writel(reg, S3C_BWSCON);
/* release the reset signal to the network and UART device */
- reg = readl(MISCCR);
+ reg = readl(S3C_MISCCR);
reg |= 0x10000;
- writel(reg, MISCCR);
+ writel(reg, S3C_MISCCR);
return 0;
}
diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c
index 56ae9149ca..6c6ccdb5f5 100644
--- a/arch/arm/boards/a9m2440/a9m2440.c
+++ b/arch/arm/boards/a9m2440/a9m2440.c
@@ -36,6 +36,7 @@
#include <mach/s3c24xx-nand.h>
#include <mach/s3c-generic.h>
#include <mach/s3c-busctl.h>
+#include <mach/s3c24xx-gpio.h>
#include "baseboards.h"
@@ -123,9 +124,9 @@ static int a9m2440_devices_init(void)
#endif
/* release the reset signal to external devices */
- reg = readl(MISCCR);
+ reg = readl(S3C_MISCCR);
reg |= 0x10000;
- writel(reg, MISCCR);
+ writel(reg, S3C_MISCCR);
/* ----------- the devices the boot loader should work with -------- */
add_generic_device("s3c24x0_nand", -1, NULL, S3C24X0_NAND_BASE, 0,
diff --git a/arch/arm/boards/a9m2440/lowlevel_init.S b/arch/arm/boards/a9m2440/lowlevel_init.S
index 57ebe3fbfc..e915a1649c 100644
--- a/arch/arm/boards/a9m2440/lowlevel_init.S
+++ b/arch/arm/boards/a9m2440/lowlevel_init.S
@@ -4,6 +4,7 @@
#include <config.h>
#include <mach/s3c-iomap.h>
+#include <mach/s3c24xx-gpio.h>
.section ".text_bare_init.board_init_lowlevel","ax"
@@ -33,7 +34,7 @@ sdram_init:
* configured yet, these pins show external settings, to detect
* the SDRAM size.
*/
- ldr r1, =GPBDAT
+ ldr r1, =S3C_GPBDAT
ldr r4, [r1]
and r4, r4, #0x3