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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-01-11 14:09:59 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-01-12 10:43:58 +0100 |
| commit | 2878a37e1bd96b4738b5d82b3788cd60147a3da4 (patch) | |
| tree | 50172b95361a999cbd1aa12feb4d480630cf940c /arch/arm/boards/at91sam9263ek | |
| parent | b380486770c4d709dcbd91240f5a5a808b369edd (diff) | |
| download | barebox-2878a37e1bd96b4738b5d82b3788cd60147a3da4.tar.gz barebox-2878a37e1bd96b4738b5d82b3788cd60147a3da4.tar.xz | |
at91sam9/lowlevel_init: allow to select the smc chipselect
this will allow to configure the nand as example
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/at91sam9263ek')
| -rw-r--r-- | arch/arm/boards/at91sam9263ek/config.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/boards/at91sam9263ek/config.h b/arch/arm/boards/at91sam9263ek/config.h index 8f764ebf40..14eb4fe241 100644 --- a/arch/arm/boards/at91sam9263ek/config.h +++ b/arch/arm/boards/at91sam9263ek/config.h @@ -61,15 +61,16 @@ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CONFIG_SYS_SMC_CS 0 +#define CONFIG_SYS_SMC_SETUP_VAL \ (AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | \ AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CONFIG_SYS_SMC_PULSE_VAL \ (AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | \ AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CONFIG_SYS_SMC_CYCLE_VAL \ (AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CONFIG_SYS_SMC_MODE_VAL \ (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ AT91_SMC_DBW_16 | \ AT91_SMC_TDFMODE | \ |