diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-07 09:08:33 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-08 15:24:25 +0200 |
| commit | 0fde244eeda2b2219fec61a6a795927c2b34c0c2 (patch) | |
| tree | 1a680609114ec6bef3cd9558bf6334901d0ab47a /arch/arm/boards/boundarydevices-nitrogen6x | |
| parent | 86ef8cb8fb7f98e859d17a59306fc5e346604a92 (diff) | |
| download | barebox-0fde244eeda2b2219fec61a6a795927c2b34c0c2.tar.gz barebox-0fde244eeda2b2219fec61a6a795927c2b34c0c2.tar.xz | |
ARM: nitrogen6x: whitespace cleanup
Align hex values under each other.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/boundarydevices-nitrogen6x')
| -rw-r--r-- | arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg index 8175cfee00..4aa7ec72f4 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg @@ -14,8 +14,8 @@ wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MDSCR 0x00428031 wm 32 MX6_MMDC_P0_MDSCR 0x19308030 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 -wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390003 -wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xA1390003 +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390003 +wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xA1390003 wm 32 MX6_MMDC_P0_MDREF 0x00005800 wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022227 wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022227 @@ -27,10 +27,10 @@ wm 32 MX6_MMDC_P0_MPRDDLCTL 0x45393B3E wm 32 MX6_MMDC_P1_MPRDDLCTL 0x403A3747 wm 32 MX6_MMDC_P0_MPWRDLCTL 0x40434541 wm 32 MX6_MMDC_P1_MPWRDLCTL 0x473E4A3B -wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x0011000E -wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x000E001B -wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x00190015 -wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00070018 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x0011000E +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x000E001B +wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x00190015 +wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00070018 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDSCR 0x00000000 |