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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-02-03 10:01:33 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-02-03 15:09:14 +0100 |
commit | 2a1f5f802e1c62b40e57beabbd7413d12a715059 (patch) | |
tree | 0af8e8d205559495af8256bdd387e1e77df768a4 /arch/arm/boards/datamodul-edm-qmx6 | |
parent | 46c034db92676dd569797c4cf03f072e56fd6734 (diff) | |
download | barebox-2a1f5f802e1c62b40e57beabbd7413d12a715059.tar.gz barebox-2a1f5f802e1c62b40e57beabbd7413d12a715059.tar.xz |
ARM: rename boards to more consistent naming
This renames the Freescale and Phytec board directories and defconfig
files to a common naming scheme. The board directories are named
<vendor>-<board> and the defconfig files are named
<vendor>-<board>_defconfig. Also the DataModul realq7 is renamed to its
Marketing Name eDM-QMX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/datamodul-edm-qmx6')
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/board.c | 135 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/env/boot/mmc | 10 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/env/config-board | 6 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/env/init/automount | 14 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/flash-header.imxcfg | 3 | ||||
-rw-r--r-- | arch/arm/boards/datamodul-edm-qmx6/lowlevel.c | 173 |
7 files changed, 343 insertions, 0 deletions
diff --git a/arch/arm/boards/datamodul-edm-qmx6/Makefile b/arch/arm/boards/datamodul-edm-qmx6/Makefile new file mode 100644 index 0000000000..bb6d9d848d --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o lowlevel.o +pbl-y += lowlevel.o diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c new file mode 100644 index 0000000000..8a49beee2f --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/board.c @@ -0,0 +1,135 @@ +/* + * Copyright (C) 2012 Steffen Trumtrar, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation. + * + */ + +#include <generated/mach-types.h> +#include <environment.h> +#include <bootsource.h> +#include <partition.h> +#include <common.h> +#include <envfs.h> +#include <sizes.h> +#include <init.h> +#include <gpio.h> +#include <fec.h> +#include <of.h> + +#include <linux/micrel_phy.h> +#include <mfd/stmpe-i2c.h> + +#include <asm/armlinux.h> +#include <asm/io.h> + +#include <mach/devices-imx6.h> +#include <mach/imx6-regs.h> +#include <mach/iomux-mx6.h> +#include <mach/imx6-mmdc.h> +#include <mach/generic.h> +#include <mach/imx6.h> +#include <mach/bbu.h> + +#define RQ7_GPIO_ENET_PHYADD2 IMX_GPIO_NR(6, 30) +#define RQ7_GPIO_ENET_MODE0 IMX_GPIO_NR(6, 25) +#define RQ7_GPIO_ENET_MODE1 IMX_GPIO_NR(6, 27) +#define RQ7_GPIO_ENET_MODE2 IMX_GPIO_NR(6, 28) +#define RQ7_GPIO_ENET_MODE3 IMX_GPIO_NR(6, 29) +#define RQ7_GPIO_ENET_EN_CLK125 IMX_GPIO_NR(6, 24) + +static iomux_v3_cfg_t realq7_pads_gpio[] = { + MX6Q_PAD_RGMII_RXC__GPIO_6_30, + MX6Q_PAD_RGMII_RD0__GPIO_6_25, + MX6Q_PAD_RGMII_RD1__GPIO_6_27, + MX6Q_PAD_RGMII_RD2__GPIO_6_28, + MX6Q_PAD_RGMII_RD3__GPIO_6_29, + MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24, +}; + +static int ksz9031rn_phy_fixup(struct phy_device *dev) +{ + /* + * min rx data delay, max rx/tx clock delay, + * min rx/tx control delay + */ + phy_write_mmd_indirect(dev, 4, 2, 0); + phy_write_mmd_indirect(dev, 5, 2, 0); + phy_write_mmd_indirect(dev, 8, 2, 0x03ff); + + return 0; +} + +static int realq7_enet_init(void) +{ + if (!of_machine_is_compatible("dmo,imx6q-edmqmx6")) + return 0; + + mxc_iomux_v3_setup_multiple_pads(realq7_pads_gpio, ARRAY_SIZE(realq7_pads_gpio)); + gpio_direction_output(RQ7_GPIO_ENET_PHYADD2, 0); + gpio_direction_output(RQ7_GPIO_ENET_MODE0, 1); + gpio_direction_output(RQ7_GPIO_ENET_MODE1, 1); + gpio_direction_output(RQ7_GPIO_ENET_MODE2, 1); + gpio_direction_output(RQ7_GPIO_ENET_MODE3, 1); + gpio_direction_output(RQ7_GPIO_ENET_EN_CLK125, 1); + + gpio_direction_output(25, 0); + mdelay(50); + + gpio_direction_output(25, 1); + mdelay(50); + + phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, + ksz9031rn_phy_fixup); + + return 0; +} +fs_initcall(realq7_enet_init); + +static int realq7_env_init(void) +{ + if (!of_machine_is_compatible("dmo,imx6q-edmqmx6")) + return 0; + + imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox", + BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0x00907000); + imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc3.barebox", + 0, NULL, 0, 0x00907000); + return 0; +} +late_initcall(realq7_env_init); + +static int realq7_console_init(void) +{ + if (!of_machine_is_compatible("dmo,imx6q-edmqmx6")) + return 0; + + barebox_set_hostname("eDM-QMX6"); + + imx6_init_lowlevel(); + + switch (bootsource_get()) { + case BOOTSOURCE_MMC: + of_device_enable_path("/chosen/environment-emmc"); + break; + default: + case BOOTSOURCE_SPI: + of_device_enable_path("/chosen/environment-spi"); + break; + } + + return 0; +} +postcore_initcall(realq7_console_init); diff --git a/arch/arm/boards/datamodul-edm-qmx6/env/boot/mmc b/arch/arm/boards/datamodul-edm-qmx6/env/boot/mmc new file mode 100644 index 0000000000..e311763c48 --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/env/boot/mmc @@ -0,0 +1,10 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "MMC" + exit +fi + +global.bootm.image="/mnt/mmc/zImage" +global.bootm.oftree="/mnt/mmc/oftree" +global.linux.bootargs.dyn.root="root=mmcblk0p2 rootfstype=ext3 rootwait" diff --git a/arch/arm/boards/datamodul-edm-qmx6/env/config-board b/arch/arm/boards/datamodul-edm-qmx6/env/config-board new file mode 100644 index 0000000000..4cabac63dd --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/env/config-board @@ -0,0 +1,6 @@ +#!/bin/sh + +# board defaults, do not change in running system. Change /env/config +# instead + +global.linux.bootargs.base="console=ttymxc1,115200" diff --git a/arch/arm/boards/datamodul-edm-qmx6/env/init/automount b/arch/arm/boards/datamodul-edm-qmx6/env/init/automount new file mode 100644 index 0000000000..2ce37c785a --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/env/init/automount @@ -0,0 +1,14 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "Automountpoints" + exit +fi + +# automount tftp server based on $eth0.serverip + +mkdir -p /mnt/tftp +automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp' + +mkdir -p /mnt/mmc +automount -d /mnt/mmc 'mci0.probe=1 && [ -e /dev/disk0.0 ] && mount /dev/disk0.0 /mnt/fat' diff --git a/arch/arm/boards/datamodul-edm-qmx6/flash-header.imxcfg b/arch/arm/boards/datamodul-edm-qmx6/flash-header.imxcfg new file mode 100644 index 0000000000..400a870154 --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/flash-header.imxcfg @@ -0,0 +1,3 @@ +soc imx6 +loadaddr 0x00907000 +dcdofs 0x400 diff --git a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c new file mode 100644 index 0000000000..de7cc98efe --- /dev/null +++ b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2013 Sascha Hauer <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include <common.h> +#include <sizes.h> +#include <io.h> +#include <debug_ll.h> +#include <asm/sections.h> +#include <asm/mmu.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/imx6-mmdc.h> + +static void sdram_init(void) +{ + writel(0x0, 0x021b0000); + writel(0xffffffff, 0x020c4068); + writel(0xffffffff, 0x020c406c); + writel(0xffffffff, 0x020c4070); + writel(0xffffffff, 0x020c4074); + writel(0xffffffff, 0x020c4078); + writel(0xffffffff, 0x020c407c); + writel(0xffffffff, 0x020c4080); + writel(0xffffffff, 0x020c4084); + writel(0x000C0000, 0x020e0798); + writel(0x00000000, 0x020e0758); + writel(0x00000030, 0x020e0588); + writel(0x00000030, 0x020e0594); + writel(0x00000030, 0x020e056c); + writel(0x00000030, 0x020e0578); + writel(0x00000030, 0x020e074c); + writel(0x00000030, 0x020e057c); + writel(0x00000000, 0x020e058c); + writel(0x00000030, 0x020e059c); + writel(0x00000030, 0x020e05a0); + writel(0x00000030, 0x020e078c); + writel(0x00020000, 0x020e0750); + writel(0x00000038, 0x020e05a8); + writel(0x00000038, 0x020e05b0); + writel(0x00000038, 0x020e0524); + writel(0x00000038, 0x020e051c); + writel(0x00000038, 0x020e0518); + writel(0x00000038, 0x020e050c); + writel(0x00000038, 0x020e05b8); + writel(0x00000038, 0x020e05c0); + writel(0x00020000, 0x020e0774); + writel(0x00000030, 0x020e0784); + writel(0x00000030, 0x020e0788); + writel(0x00000030, 0x020e0794); + writel(0x00000030, 0x020e079c); + writel(0x00000030, 0x020e07a0); + writel(0x00000030, 0x020e07a4); + writel(0x00000030, 0x020e07a8); + writel(0x00000030, 0x020e0748); + writel(0x00000030, 0x020e05ac); + writel(0x00000030, 0x020e05b4); + writel(0x00000030, 0x020e0528); + writel(0x00000030, 0x020e0520); + writel(0x00000030, 0x020e0514); + writel(0x00000030, 0x020e0510); + writel(0x00000030, 0x020e05bc); + writel(0x00000030, 0x020e05c4); + writel(0xa1390003, 0x021b0800); + writel(0x0059005C, 0x021b080c); + writel(0x00590056, 0x021b0810); + writel(0x002E0049, 0x021b480c); + writel(0x001B0033, 0x021b4810); + writel(0x434F035B, 0x021b083c); + writel(0x033F033F, 0x021b0840); + writel(0x4337033D, 0x021b483c); + writel(0x03210275, 0x021b4840); + writel(0x4C454344, 0x021b0848); + writel(0x463F3E4A, 0x021b4848); + writel(0x46314742, 0x021b0850); + writel(0x4D2A4B39, 0x021b4850); + writel(0x33333333, 0x021b081c); + writel(0x33333333, 0x021b0820); + writel(0x33333333, 0x021b0824); + writel(0x33333333, 0x021b0828); + writel(0x33333333, 0x021b481c); + writel(0x33333333, 0x021b4820); + writel(0x33333333, 0x021b4824); + writel(0x33333333, 0x021b4828); + writel(0x00000800, 0x021b08b8); + writel(0x00000800, 0x021b48b8); + writel(0x00020036, 0x021b0004); + writel(0x09555050, 0x021b0008); + writel(0x8A8F7934, 0x021b000c); + writel(0xDB568E65, 0x021b0010); + writel(0x01FF00DB, 0x021b0014); + writel(0x00000740, 0x021b0018); + writel(0x00008000, 0x021b001c); + writel(0x000026d2, 0x021b002c); + writel(0x008F0E21, 0x021b0030); + writel(0x00000047, 0x021b0040); + writel(0x11420000, 0x021b0400); + writel(0x11420000, 0x021b4400); + writel(0x841A0000, 0x021b0000); + writel(0x04108032, 0x021b001c); + writel(0x00008033, 0x021b001c); + writel(0x00048031, 0x021b001c); + writel(0x09308030, 0x021b001c); + writel(0x04008040, 0x021b001c); + writel(0x0410803A, 0x021b001c); + writel(0x0000803B, 0x021b001c); + writel(0x00048039, 0x021b001c); + writel(0x09308038, 0x021b001c); + writel(0x04008048, 0x021b001c); + writel(0x00005800, 0x021b0020); + writel(0x00011117, 0x021b0818); + writel(0x00011117, 0x021b4818); + writel(0x00025576, 0x021b0004); + writel(0x00011006, 0x021b0404); + writel(0x00000000, 0x021b001c); + + /* Enable UART for lowlevel debugging purposes. Can be removed later */ + writel(0x4, 0x020e00bc); + writel(0x4, 0x020e00c0); + writel(0x1, 0x020e0928); + writel(0x00000000, 0x021e8080); + writel(0x00004027, 0x021e8084); + writel(0x00000704, 0x021e8088); + writel(0x00000a81, 0x021e8090); + writel(0x0000002b, 0x021e809c); + writel(0x00013880, 0x021e80b0); + writel(0x0000047f, 0x021e80a4); + writel(0x0000c34f, 0x021e80a8); + writel(0x00000001, 0x021e8080); + putc_ll('>'); +} + +extern char __dtb_imx6q_dmo_edmqmx6_start[]; +extern char __dtb_imx6q_dmo_edmqmx6_end[]; + +ENTRY_FUNCTION(start_imx6_realq7, r0, r1, r2) +{ + unsigned long fdt, sdram = 0x10000000; + + arm_cpu_lowlevel_init(); + + arm_setup_stack(0x00940000 - 8); + + fdt = (unsigned long)__dtb_imx6q_dmo_edmqmx6_start - get_runtime_offset(); + + if (get_pc() < 0x10000000) { + sdram_init(); + + mmdc_do_write_level_calibration(); + mmdc_do_dqs_calibration(); + + /* + * Copy the devicetree blob to sdram so that the barebox code finds it + * inside valid SDRAM instead of SRAM. + */ + memcpy((void *)sdram, (void *)fdt, + __dtb_imx6q_dmo_edmqmx6_start - + __dtb_imx6q_dmo_edmqmx6_end); + fdt = sdram; + } + + barebox_arm_entry(sdram, SZ_2G, fdt); +} |