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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2010-07-22 05:00:13 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-23 08:35:25 +0200 |
commit | d8c86961b333a9c88cf2aa4282a43b8382e9b810 (patch) | |
tree | cf8b39db96805a2ed876ba14f6824a96ebffc906 /arch/arm/boards/edb93xx/pll_cfg.c | |
parent | d879de38e8430eeb9b37b7b6a2ac3341b0b029f7 (diff) | |
download | barebox-d8c86961b333a9c88cf2aa4282a43b8382e9b810.tar.gz barebox-d8c86961b333a9c88cf2aa4282a43b8382e9b810.tar.xz |
move boards to arch/<architecure>/boards
this will allow each arch to handle the boards more simply and depending on
there need
the env var BOARD will refer to the current board dirent
for sandbox as we have only one board the board dirent is arch/sandbox/board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/edb93xx/pll_cfg.c')
-rw-r--r-- | arch/arm/boards/edb93xx/pll_cfg.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/boards/edb93xx/pll_cfg.c b/arch/arm/boards/edb93xx/pll_cfg.c new file mode 100644 index 0000000000..a687af0a01 --- /dev/null +++ b/arch/arm/boards/edb93xx/pll_cfg.c @@ -0,0 +1,58 @@ +/* + * PLL setup for Cirrus edb93xx boards + * + * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include "pll_cfg.h" +#include "early_udelay.h" + +void pll_cfg(void) +{ + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + + /* setup PLL1 */ + writel(CLKSET1_VAL, &syscon->clkset1); + + /* + * flush the pipeline + * writing to CLKSET1 causes the EP93xx to enter standby for between + * 8 ms to 16 ms, until PLL1 stabilizes + */ + asm("nop"); + asm("nop"); + asm("nop"); + asm("nop"); + asm("nop"); + + /* setup PLL2 */ + writel(CLKSET2_VAL, &syscon->clkset2); + + /* + * the user's guide recommends to wait at least 1 ms for PLL2 to + * stabilize + */ + early_udelay(1000); +} |