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| author | Alexander Kurz <akurz@blala.de> | 2016-06-30 23:24:13 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-07-04 09:32:56 +0200 |
| commit | 59a2582df555e511e931571169eca36cf2bf1baf (patch) | |
| tree | cf31cd96a03ccc966c9bfe6c8191f574ecc92747 /arch/arm/boards/eukrea_cpuimx35 | |
| parent | 2a760a7c1ed0ea30876aced20e301ba4498a0339 (diff) | |
| download | barebox-59a2582df555e511e931571169eca36cf2bf1baf.tar.gz barebox-59a2582df555e511e931571169eca36cf2bf1baf.tar.xz | |
eukrea-cpuimx35: Fix wrong clock gating for ESDHC1
With commit 962d8b89d2ce ("imx35-regs: add defines for USB and SD") the
shifter argument for the iMX35 ESDHC1 CGR instance has been erroneously
assigned to CGR1 instead of CGR0. Fix this for the eukrea-cpuimx35 board.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/eukrea_cpuimx35')
| -rw-r--r-- | arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c index 568abc2609..04ef9b2e00 100644 --- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c +++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c @@ -232,10 +232,12 @@ static int eukrea_cpuimx35_core_init(void) { u32 reg; - /* enable clock for I2C1, SDHC1, USB and FEC */ + /* enable clock for I2C1, ESDHC1, USB and FEC */ + reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); + reg |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT; + reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); reg |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - reg |= 0x3 << MX35_CCM_CGR1_SDHC1_SHIFT; reg |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT, reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR2); |