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| author | Alexander Kurz <akurz@blala.de> | 2016-06-26 16:19:35 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-27 11:04:14 +0200 |
| commit | db77cf34864e6a4acc10f8e398db0d71075e6447 (patch) | |
| tree | 965b3b3ebc39e32a5cdfb5b760a4d84aae2bb233 /arch/arm/boards/freescale-mx53-qsb | |
| parent | c3bf921125e0719a2785cd018c4cc4fb44477280 (diff) | |
| download | barebox-db77cf34864e6a4acc10f8e398db0d71075e6447.tar.gz barebox-db77cf34864e6a4acc10f8e398db0d71075e6447.tar.xz | |
ARM iMX53: avoid magic number addressing for internal RAM
The imx53 SOC features 128kB of internal SRAM which is commonly used in
early stages of barebox to store the stack. Avoid magic numbers while
addressing this RAM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/freescale-mx53-qsb')
| -rw-r--r-- | arch/arm/boards/freescale-mx53-qsb/lowlevel.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c index ce6a290ca2..bed886357c 100644 --- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c @@ -1,4 +1,5 @@ #include <common.h> +#include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> @@ -12,7 +13,7 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); fdt = __dtb_imx53_qsb_start - get_runtime_offset(); @@ -26,7 +27,7 @@ ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); fdt = __dtb_imx53_qsrb_start - get_runtime_offset(); |