ARM: i.MX6 sabrelite: switch to devicetree probing

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 24 insertions, 132 deletions

diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c
index 2afaae3007..ff27b05b14 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/board.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c
@@ -29,6 +29,7 @@
 #include <mach/generic.h>
 #include <sizes.h>
 #include <net.h>
+#include <linux/micrel_phy.h>
 #include <mach/imx6.h>
 #include <mach/devices-imx6.h>
 #include <mach/iomux-mx6.h>
@@ -37,73 +38,8 @@
 #include <mach/spi.h>
 #include <mach/usb.h>
 
-#define SABRELITE_SD3_WP	IMX_GPIO_NR(7, 1)
-#define SABRELITE_SD3_CD	IMX_GPIO_NR(7, 0)
-
-#define SABRELITE_SD4_CD	IMX_GPIO_NR(2, 6)
-
-static iomux_v3_cfg_t sabrelite_pads[] = {
-	/* UART1 */
-	MX6Q_PAD_SD3_DAT6__UART1_RXD,
-	MX6Q_PAD_SD3_DAT7__UART1_TXD,
-	MX6Q_PAD_EIM_D26__UART2_TXD,
-	MX6Q_PAD_EIM_D27__UART2_RXD,
-
-	/* SD3 (bottom) */
-	MX6Q_PAD_SD3_CMD__USDHC3_CMD,
-	MX6Q_PAD_SD3_CLK__USDHC3_CLK,
-	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
-	MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
-	MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
-	MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
-	MX6Q_PAD_SD3_DAT4__GPIO_7_1, /* WP */
-	MX6Q_PAD_SD3_DAT5__GPIO_7_0, /* CD */
-
-	/* SD4 (top) */
-	MX6Q_PAD_SD4_CLK__USDHC4_CLK,
-	MX6Q_PAD_SD4_CMD__USDHC4_CMD,
-	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
-	MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
-	MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
-	MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
-	MX6Q_PAD_NANDF_D6__GPIO_2_6, /* CD */
-
-	/* ECSPI */
-	MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
-	MX6Q_PAD_EIM_D17__ECSPI1_MISO,
-	MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
-	MX6Q_PAD_EIM_D19__GPIO_3_19,	/* CS1 */
-
-	/* I2C0 */
-	MX6Q_PAD_EIM_D21__I2C1_SCL,
-	MX6Q_PAD_EIM_D28__I2C1_SDA,
-
-	/* I2C1 */
-	MX6Q_PAD_KEY_COL3__I2C2_SCL,
-	MX6Q_PAD_KEY_ROW3__I2C2_SDA,
-
-	/* I2C2 */
-	MX6Q_PAD_GPIO_5__I2C3_SCL,
-	MX6Q_PAD_GPIO_16__I2C3_SDA,
-
-	/* USB */
-	MX6Q_PAD_GPIO_17__GPIO_7_12,
-	MX6Q_PAD_EIM_D22__GPIO_3_22,
-	MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC,
-};
-
-static iomux_v3_cfg_t sabrelite_enet_pads[] = {
+static iomux_v3_cfg_t sabrelite_enet_gpio_pads[] = {
 	/* Ethernet */
-	MX6Q_PAD_ENET_MDC__ENET_MDC,
-	MX6Q_PAD_ENET_MDIO__ENET_MDIO,
-	MX6Q_PAD_ENET_REF_CLK__GPIO_1_23,	// LED mode
-	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
-	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
-	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
-	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
-	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
-	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
-	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
 	MX6Q_PAD_EIM_D23__GPIO_3_23,		/* RGMII_nRST */
 	MX6Q_PAD_RGMII_RXC__GPIO_6_30,		/* PHYAD */
 	MX6Q_PAD_RGMII_RD0__GPIO_6_25,		/* MODE0 */
@@ -113,16 +49,6 @@ static iomux_v3_cfg_t sabrelite_enet_pads[] = {
 	MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
 };
 
-static iomux_v3_cfg_t sabrelite_enet2_pads[] = {
-	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
-	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
-	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
-	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
-	MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
-	MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
-	MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
-};
-
 static int sabrelite_mem_init(void)
 {
 	arm_add_mem_device("ram0", 0x10000000, SZ_1G);
@@ -131,7 +57,7 @@ static int sabrelite_mem_init(void)
 }
 mem_initcall(sabrelite_mem_init);
 
-static void mx6_rgmii_rework(struct phy_device *dev)
+static int ksz9021rn_phy_fixup(struct phy_device *dev)
 {
 	phy_write(dev, 0x09, 0x0f00);
 
@@ -144,17 +70,14 @@ static void mx6_rgmii_rework(struct phy_device *dev)
 	phy_write(dev, 0x0b, 0x8104);
 	phy_write(dev, 0x0c, 0xf0f0);
 	phy_write(dev, 0x0b, 0x104);
-}
 
-static struct fec_platform_data fec_info = {
-	.xcv_type = PHY_INTERFACE_MODE_RGMII,
-	.phy_init = mx6_rgmii_rework,
-	.phy_addr = 6,
-};
+	return 0;
+}
 
 static int sabrelite_ksz9021rn_setup(void)
 {
-	mxc_iomux_v3_setup_multiple_pads(sabrelite_enet_pads, ARRAY_SIZE(sabrelite_enet_pads));
+	mxc_iomux_v3_setup_multiple_pads(sabrelite_enet_gpio_pads,
+			ARRAY_SIZE(sabrelite_enet_gpio_pads));
 
 	gpio_direction_output(87, 0);  /* GPIO 3-23 */
 
@@ -175,10 +98,13 @@ static int sabrelite_ksz9021rn_setup(void)
 	mdelay(10);
 	gpio_set_value(87, 1);
 
-	mxc_iomux_v3_setup_multiple_pads(sabrelite_enet2_pads, ARRAY_SIZE(sabrelite_enet2_pads));
-
 	return 0;
 }
+/*
+ * Do this before the fec initializes but after our
+ * gpios are available.
+ */
+fs_initcall(sabrelite_ksz9021rn_setup);
 
 static inline int imx6_iim_register_fec_ethaddr(void)
 {
@@ -200,35 +126,6 @@ static inline int imx6_iim_register_fec_ethaddr(void)
 	return 0;
 }
 
-static int sabrelite_spi_cs[] = {IMX_GPIO_NR(3, 19)};
-
-static struct spi_imx_master sabrelite_spi_0_data = {
-	.chipselect = sabrelite_spi_cs,
-	.num_chipselect = ARRAY_SIZE(sabrelite_spi_cs),
-};
-
-static const struct spi_board_info sabrelite_spi_board_info[] = {
-	{
-		.name = "m25p80",
-		.max_speed_hz = 40000000,
-		.bus_num = 0,
-		.chip_select = 0,
-	}
-};
-
-static struct esdhc_platform_data sabrelite_sd3_data = {
-	.cd_gpio = SABRELITE_SD3_CD,
-	.cd_type = ESDHC_CD_GPIO,
-	.wp_gpio = SABRELITE_SD3_WP,
-	.wp_type = ESDHC_WP_GPIO,
-};
-
-static struct esdhc_platform_data sabrelite_sd4_data = {
-	.cd_gpio = SABRELITE_SD4_CD,
-	.cd_type = ESDHC_CD_GPIO,
-	.wp_type = ESDHC_WP_NONE,
-};
-
 static void sabrelite_ehci_init(void)
 {
 	imx6_usb_phy2_disable_oc();
@@ -244,19 +141,8 @@ static void sabrelite_ehci_init(void)
 
 static int sabrelite_devices_init(void)
 {
-	imx6_add_mmc2(&sabrelite_sd3_data);
-	imx6_add_mmc3(&sabrelite_sd4_data);
-
-	sabrelite_ksz9021rn_setup();
-	imx6_iim_register_fec_ethaddr();
-	imx6_add_fec(&fec_info);
-
 	sabrelite_ehci_init();
 
-	spi_register_board_info(sabrelite_spi_board_info,
-			ARRAY_SIZE(sabrelite_spi_board_info));
-	imx6_add_spi0(&sabrelite_spi_0_data);
-
 	armlinux_set_bootparams((void *)0x10000100);
 	armlinux_set_architecture(3769);
 
@@ -265,17 +151,23 @@ static int sabrelite_devices_init(void)
 
 	return 0;
 }
-
 device_initcall(sabrelite_devices_init);
 
-static int sabrelite_console_init(void)
+static int sabrelite_coredevices_init(void)
 {
-	mxc_iomux_v3_setup_multiple_pads(sabrelite_pads, ARRAY_SIZE(sabrelite_pads));
+	phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
+					   ksz9021rn_phy_fixup);
 
-	imx6_init_lowlevel();
+	imx6_iim_register_fec_ethaddr();
+
+	return 0;
+}
+coredevice_initcall(sabrelite_coredevices_init);
 
-	imx6_add_uart1();
+static int sabrelite_core_init(void)
+{
+	imx6_init_lowlevel();
 
 	return 0;
 }
-console_initcall(sabrelite_console_init);
+core_initcall(sabrelite_core_init);