diff options
author | Rouven Czerwinski <r.czerwinski@pengutronix.de> | 2019-08-06 07:11:06 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-08-07 09:42:15 +0200 |
commit | dd5dfb6ff467f6d640e48046acedfe435c649c94 (patch) | |
tree | 03decf2d0a727847de7123d88e37e0169680b64a /arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | |
parent | c3ec17379dd2fb84bcce845b612e2a9f3d6eeab9 (diff) | |
download | barebox-dd5dfb6ff467f6d640e48046acedfe435c649c94.tar.gz barebox-dd5dfb6ff467f6d640e48046acedfe435c649c94.tar.xz |
boards: nxp-mx8-evk: rework to different boot flow
Rework the evk boot flow to use the new piggydata load function and
install a trampoline for the TF-A setup. This allows the PBL boot
process to stay in SRAM up until the verification of the piggydata is
done and main barebox can be loaded.
The trampoline loads 4 bytes right after the trampoline, we copy the
runtime offset there so the trampoline jumps back into the SRAM PBL.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/nxp-imx8mq-evk/lowlevel.c')
-rw-r--r-- | arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 81 |
1 files changed, 45 insertions, 36 deletions
diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index 6451e5d414..bc7827bf01 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -53,20 +53,29 @@ static void setup_uart(void) static void nxp_imx8mq_evk_sram_setup(void) { - enum bootsource src = BOOTSOURCE_UNKNOWN; - int instance = BOOTSOURCE_INSTANCE_UNKNOWN; - int ret = -ENOTSUPP; - ddr_init(); +} - imx8_get_boot_source(&src, &instance); +extern unsigned char trampoline_start[]; +extern unsigned char trampoline_end[]; - if (src == BOOTSOURCE_MMC) - ret = imx8_esdhc_start_image(instance); +static void nxp_imx8mq_evk_install_tfa_trampoline(void) +{ + unsigned int tramp_len; + unsigned int offset; + /* + * Create a trampoline which is places in DRAM and calls back into the + * PBL entry function found in the TCRAM. Register x0 is set to 1 to + * indicate that DRAM setup was already run. + */ + tramp_len = (void *)trampoline_end - (void *)trampoline_start; + memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, (void *)trampoline_start, + tramp_len); - BUG_ON(ret); + offset = get_runtime_offset(); + memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR + tramp_len, &offset, + sizeof(offset)); } - /* * Power-on execution flow of start_nxp_imx8mq_evk() might not be * obvious for a very first read, so here's, hopefully helpful, @@ -75,53 +84,53 @@ static void nxp_imx8mq_evk_sram_setup(void) * 1. MaskROM uploads PBL into OCRAM and that's where this function is * executed for the first time * - * 2. DDR is initialized and full i.MX image is loaded to the - * beginning of RAM - * - * 3. start_nxp_imx8mq_evk, now in RAM, is executed again + * 2. DDR is initialized and the TF-A trampoline is installed in the + * DRAM. * - * 4. BL31 blob is uploaded to OCRAM and the control is transfer to it + * 3. TF-A is executed and exits into the trampoline in RAM, which enters the + * PBL for the second time. DRAM setup done is indicated by a one in register + * x0 by the trampoline * - * 5. BL31 exits EL3 into EL2 at address MX8MQ_ATF_BL33_BASE_ADDR, - * executing start_nxp_imx8mq_evk() the third time + * 4. The piggydata is loaded from the SD card and copied to the expected + * location in the DRAM. * - * 6. Standard barebox boot flow continues + * 5. Standard barebox boot flow continues */ ENTRY_FUNCTION(start_nxp_imx8mq_evk, r0, r1, r2) { + enum bootsource src = BOOTSOURCE_UNKNOWN; + int instance = BOOTSOURCE_INSTANCE_UNKNOWN; + int ret = -ENOTSUPP; + const u8 *bl31; + size_t bl31_size; + imx8mq_cpu_lowlevel_init(); if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - if (get_pc() < MX8MQ_DDR_CSD1_BASE_ADDR) { - /* - * We assume that we were just loaded by MaskROM into - * SRAM if we are not running from DDR. We also assume - * that means DDR needs to be initialized for the - * first time. - */ - nxp_imx8mq_evk_sram_setup(); - } /* - * Straight from the power-on we are at EL3, so the following - * code _will_ load and jump to ATF. - * - * However when we are re-executed upon exit from ATF's - * initialization routine, it is EL2 which means we'll skip - * loadting ATF blob again + * if register r0 does not contain 1, we are running for the first time + * and need to initialize the DRAM, install the trampoline and run TF-A + * (BL31). + * Otherwise the 1 indicates that the DRAM setup and trampoline are + * already installed and TF-A has been run. In this case we can skip */ if (current_el() == 3) { - const u8 *bl31; - size_t bl31_size; - + nxp_imx8mq_evk_sram_setup(); + nxp_imx8mq_evk_install_tfa_trampoline(); get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); imx8mq_atf_load_bl31(bl31, bl31_size); } + imx8_get_boot_source(&src, &instance); + + if (src == BOOTSOURCE_MMC) + ret = imx8_esdhc_load_piggy(instance); + else + BUG_ON(ret); /* * Standard entry we hit once we initialized both DDR and ATF */ imx8mq_barebox_entry(__dtb_imx8mq_evk_start); } - |