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author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-08 11:37:45 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-10 14:49:47 +0100 |
commit | cad14480bfb3868bd07be53176861cba16105a2f (patch) | |
tree | 193d852cbd16a7932f0bdf06bc0dae286449b25c /arch/arm/boards/pcm037 | |
parent | c28810e08fb4f96cc714d7d69a8eb01415c0ed5c (diff) | |
download | barebox-cad14480bfb3868bd07be53176861cba16105a2f.tar.gz barebox-cad14480bfb3868bd07be53176861cba16105a2f.tar.xz |
ARM: create a second level page table entry for the exception vectors
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/pcm037')
-rw-r--r-- | arch/arm/boards/pcm037/pcm037.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c index ffecec21da..cb4ffe69f4 100644 --- a/arch/arm/boards/pcm037/pcm037.c +++ b/arch/arm/boards/pcm037/pcm037.c @@ -239,11 +239,6 @@ static void pcm037_mmu_init(void) setup_dma_coherent(0x10000000); -#if TEXT_BASE & (0x100000 - 1) -#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary -#else - arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED); -#endif mmu_enable(); #ifdef CONFIG_CACHE_L2X0 |