summaryrefslogtreecommitdiffstats
path: root/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2020-02-14 11:53:38 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-02-19 08:30:32 +0100
commit0266042714b2e0a17e397fe5d8a29a4487785df4 (patch)
tree3ec6d49a15181e40d14ef2349afdbd84438acd2d /arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c
parent5973ed7e2196aac7df53f81033cd46b51acba09c (diff)
downloadbarebox-0266042714b2e0a17e397fe5d8a29a4487785df4.tar.gz
ARM: i.MX8M: Add DDR controller support
This adds the DDR driver for the i.MX8MQ/i.MX8MM. It's taken from U-Boot v2020.04-rc1 with slight modifications for barebox The i.MX8MQ boards in the tree currently use the output of an earlier version of the NXP i.MX8M DDR Tool which doesn't use a controller driver but instead does most stuff in board code. It seems this can coexist with the new driver, only a few helper functions that previously lived in arch/arm/mach-imx/imx8-ddrc.c are now provided by the new driver. Tested on an i.MX8MM EVK Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c')
-rw-r--r--arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c
index 56af647..cc00527 100644
--- a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c
+++ b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c
@@ -9,7 +9,6 @@
#include "ddr.h"
-extern void wait_ddrphy_training_complete(void);
void ddr_cfg_phy(void) {
unsigned int tmp, tmp_t;