Merge branch 'for-next/pxa'

14 files changed, 517 insertions, 0 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index f9daa08a38..a85de760f7 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_MACH_HIGHBANK)			+= highbank/
 obj-$(CONFIG_MACH_IMX21ADS)			+= freescale-mx21-ads/
 obj-$(CONFIG_MACH_IMX233_OLINUXINO)		+= imx233-olinuxino/
 obj-$(CONFIG_MACH_IMX27ADS)			+= freescale-mx27-ads/
+obj-$(CONFIG_MACH_LUBBOCK)			+= lubbock/
 obj-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP)		+= marvell-armada-xp-gp/
 obj-$(CONFIG_MACH_MB7707)			+= module-mb7707/
 obj-$(CONFIG_MACH_MIOA701)			+= mioa701/
@@ -126,4 +127,5 @@ obj-$(CONFIG_MACH_VERSATILEPB)			+= versatile/
 obj-$(CONFIG_MACH_VEXPRESS)			+= vexpress/
 obj-$(CONFIG_MACH_VIRT2REAL)			+= virt2real/
 obj-$(CONFIG_MACH_ZEDBOARD)			+= avnet-zedboard/
+obj-$(CONFIG_MACH_ZYLONITE)			+= zylonite/
 obj-$(CONFIG_MACH_VARISCITE_MX6)		+= variscite-mx6/
diff --git a/arch/arm/boards/lubbock/Makefile b/arch/arm/boards/lubbock/Makefile
new file mode 100644
index 0000000000..01c7a259e9
--- /dev/null
+++ b/arch/arm/boards/lubbock/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/lubbock/board.c b/arch/arm/boards/lubbock/board.c
new file mode 100644
index 0000000000..6f517d8926
--- /dev/null
+++ b/arch/arm/boards/lubbock/board.c
@@ -0,0 +1,134 @@
+/*
+ * (C) 2011 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <environment.h>
+#include <fs.h>
+#include <init.h>
+#include <partition.h>
+#include <led.h>
+#include <gpio.h>
+#include <pwm.h>
+#include <linux/sizes.h>
+
+#include <mach/devices.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/pxa-regs.h>
+#include <mach/udc_pxa2xx.h>
+#include <mach/mci_pxa2xx.h>
+
+#include <net/smc91111.h>
+#include <asm/armlinux.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+
+#include <generated/mach-types.h>
+
+#define ECOR            0x8000
+#define ECOR_RESET      0x80
+#define ECOR_LEVEL_IRQ  0x40
+#define ECOR_WR_ATTRIB  0x04
+#define ECOR_ENABLE     0x01
+
+#define ECSR            0x8002
+#define ECSR_IOIS8      0x20
+#define ECSR_PWRDWN     0x04
+#define ECSR_INT        0x02
+
+static struct smc91c111_pdata smsc91x_pdata = {
+	.control_setup = 0x0800,
+	.config_setup = 0x10b2,
+	.bus_width = 16,
+	.addr_shift = 2,
+};
+
+static unsigned long lubbock_pin_config[] = {
+	GPIO15_nCS_1,	/* CS1 - Flash */
+	GPIO78_nCS_2,	/* CS2 - Baseboard FGPA + SRAM */
+	GPIO79_nCS_3,	/* CS3 - SMC ethernet */
+	GPIO80_nCS_4,	/* CS4 - SA1111 */
+
+	/* LCD - 16bpp DSTN */
+	GPIOxx_LCD_DSTN_16BPP,
+
+	/* FFUART */
+	GPIO34_FFUART_RXD,
+	GPIO35_FFUART_CTS,
+	GPIO36_FFUART_DCD,
+	GPIO37_FFUART_DSR,
+	GPIO38_FFUART_RI,
+	GPIO39_FFUART_TXD,
+	GPIO40_FFUART_DTR,
+	GPIO41_FFUART_RTS,
+};
+
+static int lubbock_devices_init(void)
+{
+	void *nor0_iospace;
+
+	armlinux_set_architecture(MACH_TYPE_LUBBOCK);
+
+	pxa_add_uart((void *)0x40100000, 0);
+	pxa_add_pwm((void *)0x40b00000, 0);
+
+	nor0_iospace = map_io_sections(0x0, (void *)0xe0000000, SZ_64M);
+	add_cfi_flash_device(0, (ulong)nor0_iospace, SZ_64M, 0);
+	add_cfi_flash_device(1, 0x04000000, SZ_64M, 0);
+	devfs_add_partition("nor0", SZ_2M, SZ_256K, DEVFS_PARTITION_FIXED,
+			    "env0");
+	add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL,
+			   0x0c000300, 0xff4000, IORESOURCE_MEM,
+			   &smsc91x_pdata);
+	return 0;
+}
+
+device_initcall(lubbock_devices_init);
+
+static void smc_init(void)
+{
+	/* SMC91c96 */
+	void __iomem *attaddr = (void __iomem *)0x0e000000;
+
+	writel(ECOR_RESET, attaddr + (ECOR << 2));
+	mdelay(100);
+	writel(0, attaddr + (ECOR << 2));
+	writel(ECOR_ENABLE, attaddr + (ECOR << 2));
+
+	/* force 16-bit mode */
+	writel(0, attaddr + (ECSR << 2));
+	mdelay(100);
+}
+
+static int lubbock_coredevice_init(void)
+{
+	barebox_set_model("Lubbock PXA25x");
+	barebox_set_hostname("lubbock");
+	pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config));
+	smc_init();
+	return 0;
+}
+coredevice_initcall(lubbock_coredevice_init);
+
+static int lubbock_mem_init(void)
+{
+	arm_add_mem_device("ram0", 0xa0000000, SZ_64M);
+	add_mem_device("sram0", 0x0a000000, SZ_1M, IORESOURCE_MEM_WRITEABLE);
+	return 0;
+}
+mem_initcall(lubbock_mem_init);
diff --git a/arch/arm/boards/lubbock/env/boot/nor-ubi b/arch/arm/boards/lubbock/env/boot/nor-ubi
new file mode 100644
index 0000000000..533605e86a
--- /dev/null
+++ b/arch/arm/boards/lubbock/env/boot/nor-ubi
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+global.bootm.image="/dev/nor0.kernel"
+#global.bootm.oftree="/env/oftree"
+global.linux.bootargs.dyn.root="root=ubi0:linux_root ubi.mtd=nor0.root rootfstype=ubifs"
diff --git a/arch/arm/boards/lubbock/env/init/mtdparts-nor b/arch/arm/boards/lubbock/env/init/mtdparts-nor
new file mode 100644
index 0000000000..3307596467
--- /dev/null
+++ b/arch/arm/boards/lubbock/env/init/mtdparts-nor
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+if [ "$1" = menu ]; then
+        init-menu-add-entry "$0" "NOR partitions"
+        exit
+fi
+
+mtdparts="2048k@0(nor0.barebox)ro,256k(nor0.barebox-env),256k(nor0.barebox-logo),256k(nor0.barebox-logo2),5120k(nor0.kernel),-(nor0.root)"
+kernelname="application-flash"
+
+mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts}
diff --git a/arch/arm/boards/lubbock/env/nv/linux.bootargs.base b/arch/arm/boards/lubbock/env/nv/linux.bootargs.base
new file mode 100644
index 0000000000..476b1fbe49
--- /dev/null
+++ b/arch/arm/boards/lubbock/env/nv/linux.bootargs.base
@@ -0,0 +1 @@
+console=ttyS0,115200
diff --git a/arch/arm/boards/lubbock/lowlevel.c b/arch/arm/boards/lubbock/lowlevel.c
new file mode 100644
index 0000000000..3c8ae76e03
--- /dev/null
+++ b/arch/arm/boards/lubbock/lowlevel.c
@@ -0,0 +1,192 @@
+#include <common.h>
+#include <init.h>
+#include <io.h>
+
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <linux/sizes.h>
+#include <mach/pxa-regs.h>
+#include <mach/regs-ost.h>
+
+/*
+ * Memory settings
+ */
+#define DEFAULT_MSC0_VAL	0x23d223d2
+#define DEFAULT_MSC1_VAL	0x3ff1a441
+#define DEFAULT_MSC2_VAL	0x7ff17ff1
+#define DEFAULT_MDCNFG_VAL	0x00001ac9
+#define DEFAULT_MDREFR_VAL	0x00018018
+#define DEFAULT_MDMRS_VAL	0x00000000
+
+#define DEFAULT_FLYCNFG_VAL	0x00000000
+#define DEFAULT_SXCNFG_VAL	0x00000000
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define DEFAULT_MECR_VAL	0x00000000
+#define DEFAULT_MCMEM0_VAL	0x00010504
+#define DEFAULT_MCMEM1_VAL	0x00010504
+#define DEFAULT_MCATT0_VAL	0x00010504
+#define DEFAULT_MCATT1_VAL	0x00010504
+#define DEFAULT_MCIO0_VAL	0x00004715
+#define DEFAULT_MCIO1_VAL	0x00004715
+
+static inline void writelrb(uint32_t val, volatile u32 __iomem *addr)
+{
+	writel(val, addr);
+	barrier();
+	readl(addr);
+	barrier();
+}
+
+static inline void pxa_wait_ticks(int ticks)
+{
+	writel(0, &OSCR);
+	while (readl(&OSCR) < ticks)
+		barrier();
+}
+
+static inline void pxa2xx_dram_init(void)
+{
+	uint32_t tmp;
+	int i;
+	/*
+	 * 1) Initialize Asynchronous static memory controller
+	 */
+
+	writelrb(DEFAULT_MSC0_VAL, &MSC0);
+	writelrb(DEFAULT_MSC1_VAL, &MSC1);
+	writelrb(DEFAULT_MSC2_VAL, &MSC2);
+	/*
+	 * 2) Initialize Card Interface
+	 */
+
+	/* MECR: Memory Expansion Card Register */
+	writelrb(DEFAULT_MECR_VAL, &MECR);
+	/* MCMEM0: Card Interface slot 0 timing */
+	writelrb(DEFAULT_MCMEM0_VAL, &MCMEM0);
+	/* MCMEM1: Card Interface slot 1 timing */
+	writelrb(DEFAULT_MCMEM1_VAL, &MCMEM1);
+	/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
+	writelrb(DEFAULT_MCATT0_VAL, &MCATT0);
+	/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
+	writelrb(DEFAULT_MCATT1_VAL, &MCATT1);
+	/* MCIO0: Card Interface I/O Space Timing, slot 0 */
+	writelrb(DEFAULT_MCIO0_VAL, &MCIO0);
+	/* MCIO1: Card Interface I/O Space Timing, slot 1 */
+	writelrb(DEFAULT_MCIO1_VAL, &MCIO1);
+
+	/*
+	 * 3) Configure Fly-By DMA register
+	 */
+
+	writelrb(DEFAULT_FLYCNFG_VAL, &FLYCNFG);
+
+	/*
+	 * 4) Initialize Timing for Sync Memory (SDCLK0)
+	 */
+
+	/*
+	 * Before accessing MDREFR we need a valid DRI field, so we set
+	 * this to power on defaults + DRI field.
+	 */
+
+	/* Read current MDREFR config and zero out DRI */
+	tmp = readl(&MDREFR) & ~0xfff;
+	/* Add user-specified DRI */
+	tmp |= DEFAULT_MDREFR_VAL & 0xfff;
+	/* Configure important bits */
+	tmp |= MDREFR_K0RUN | MDREFR_SLFRSH;
+	tmp &= ~(MDREFR_APD | MDREFR_E1PIN);
+
+	/* Write MDREFR back */
+	writelrb(tmp, &MDREFR);
+
+	/*
+	 * 5) Initialize Synchronous Static Memory (Flash/Peripherals)
+	 */
+
+	/* Initialize SXCNFG register. Assert the enable bits.
+	 *
+	 * Write SXMRS to cause an MRS command to all enabled banks of
+	 * synchronous static memory. Note that SXLCR need not be written
+	 * at this time.
+	 */
+	writelrb(DEFAULT_SXCNFG_VAL, &SXCNFG);
+
+	/*
+	 * 6) Initialize SDRAM
+	 */
+
+	writelrb(DEFAULT_MDREFR_VAL & ~MDREFR_SLFRSH, &MDREFR);
+	writelrb(DEFAULT_MDREFR_VAL | MDREFR_E1PIN, &MDREFR);
+
+	/*
+	 * 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure
+	 *    but not enable each SDRAM partition pair.
+	 */
+
+	writelrb(DEFAULT_MDCNFG_VAL &
+		 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), &MDCNFG);
+	/* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
+	pxa_wait_ticks(0x300);
+
+	/*
+	 * 8) Trigger a number (usually 8) refresh cycles by attempting
+	 *    non-burst read or write accesses to disabled SDRAM, as commonly
+	 *    specified in the power up sequence documented in SDRAM data
+	 *    sheets. The address(es) used for this purpose must not be
+	 *    cacheable.
+	 */
+	for (i = 9; i >= 0; i--) {
+		writel(i, 0xa0000000);
+		barrier();
+	}
+	/*
+	 * 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1).
+	 */
+
+	tmp = DEFAULT_MDCNFG_VAL &
+		(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3);
+	tmp |= readl(&MDCNFG);
+	writelrb(tmp, &MDCNFG);
+
+	/*
+	 * 10) Write MDMRS.
+	 */
+
+	writelrb(DEFAULT_MDMRS_VAL, &MDMRS);
+
+	/*
+	 * 11) Enable APD
+	 */
+
+	if (DEFAULT_MDREFR_VAL & MDREFR_APD) {
+		tmp = readl(&MDREFR);
+		tmp |= MDREFR_APD;
+		writelrb(tmp, &MDREFR);
+	}
+}
+
+void __bare_init __naked barebox_arm_reset_vector(void)
+{
+	unsigned long pssr = PSSR;
+	unsigned long pc = get_pc();
+
+	arm_cpu_lowlevel_init();
+	CKEN |= CKEN_OSTIMER | CKEN_MEMC | CKEN_FFUART;
+
+	/*
+	 * When not running from SDRAM, get it out of self refresh, and/or
+	 * initialize it.
+	 */
+	if (!(pc >= 0xa0000000 && pc < 0xb0000000))
+		pxa2xx_dram_init();
+
+	if ((pssr >= 0xa0000000 && pssr < 0xb0000000) ||
+	    (pssr >= 0x04000000 && pssr < 0x10000000))
+		asm("mov pc, %0" : : "r"(pssr) : );
+
+	barebox_arm_entry(0xa0000000, SZ_64M, 0);
+}
diff --git a/arch/arm/boards/zylonite/Makefile b/arch/arm/boards/zylonite/Makefile
new file mode 100644
index 0000000000..01c7a259e9
--- /dev/null
+++ b/arch/arm/boards/zylonite/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/zylonite/board.c b/arch/arm/boards/zylonite/board.c
new file mode 100644
index 0000000000..dabc6ffb0b
--- /dev/null
+++ b/arch/arm/boards/zylonite/board.c
@@ -0,0 +1,101 @@
+/*
+ * (C) 2014 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+
+#include <driver.h>
+#include <environment.h>
+#include <fs.h>
+#include <gpio.h>
+#include <init.h>
+#include <partition.h>
+#include <led.h>
+#include <net/smc91111.h>
+#include <platform_data/mtd-nand-mrvl.h>
+#include <pwm.h>
+
+#include <mach/devices.h>
+#include <mach/mfp-pxa3xx.h>
+#include <mach/pxa-regs.h>
+
+#include <asm/armlinux.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <generated/mach-types.h>
+
+#include "zylonite.h"
+
+static struct smc91c111_pdata smsc91x_pdata;
+static struct mrvl_nand_platform_data nand_pdata = {
+	.keep_config = 0,
+	.flash_bbt = 1,
+};
+
+static mfp_cfg_t pxa310_mfp_cfg[] = {
+	/* FFUART */
+	MFP_CFG_LPM(GPIO99,  AF1, FLOAT),	/* GPIO99_UART1_RXD */
+	MFP_CFG_LPM(GPIO100, AF1, FLOAT),	/* GPIO100_UART1_RXD */
+	MFP_CFG_LPM(GPIO101, AF1, FLOAT),	/* GPIO101_UART1_CTS */
+	MFP_CFG_LPM(GPIO106, AF1, FLOAT),	/* GPIO106_UART1_CTS */
+
+	/* Ethernet */
+	MFP_CFG(GPIO2,  AF1),			/* GPIO2_nCS3 */
+};
+
+static int zylonite_devices_init(void)
+{
+	armlinux_set_architecture(MACH_TYPE_ZYLONITE);
+	pxa_add_uart((void *)0x40100000, 0);
+	add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL,
+			   0x14000300, 0x100000, IORESOURCE_MEM,
+			   &smsc91x_pdata);
+	add_generic_device("mrvl_nand", DEVICE_ID_DYNAMIC, NULL,
+			   0x43100000, 0x1000, IORESOURCE_MEM, &nand_pdata);
+	return 0;
+}
+device_initcall(zylonite_devices_init);
+
+static int zylonite_coredevice_init(void)
+{
+	barebox_set_model("Zylonite");
+	barebox_set_hostname("zylonite");
+
+	mfp_init();
+	if (cpu_is_pxa310())
+		pxa3xx_mfp_config(pxa310_mfp_cfg, ARRAY_SIZE(pxa310_mfp_cfg));
+	CKENA |= CKEN_NAND | CKEN_SMC | CKEN_FFUART | CKEN_GPIO;
+	/*
+	 * Configure Ethernet controller :
+	 * MCS1: setup VLIO on nCS3, with 15 DF_SCLK cycles (max) for hold,
+	 *       setup and assertion times
+	 * CSADRCFG3: DFI AA/D multiplexing VLIO, addr split at bit <16>, full
+	 * latched mode, 7 DF_SCLK cycles (max) for nLUA and nLLA.
+	 */
+	MSC1 = 0x7ffc0000 | (MSC1 & 0x0000ffff);
+	CSADRCFG3 = 0x003e080b;
+
+	return 0;
+}
+coredevice_initcall(zylonite_coredevice_init);
+
+static int zylonite_mem_init(void)
+{
+	arm_add_mem_device("ram0", 0x80000000, 64 * 1024 * 1024);
+	return 0;
+}
+mem_initcall(zylonite_mem_init);
diff --git a/arch/arm/boards/zylonite/env/bin/init b/arch/arm/boards/zylonite/env/bin/init
new file mode 100644
index 0000000000..a6bc087b22
--- /dev/null
+++ b/arch/arm/boards/zylonite/env/bin/init
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+PATH=/env/bin
+export PATH
+
+. /env/config
+addpart /dev/nand0 $mtdparts
+usbserial -s "Zylonite usb gadget"
+
+# Phase1: check for MTD override
+mtd_env_override
+if [ $? = 0 ]; then
+    echo "Switching to custom environment"
+    /env/init
+    exit
+fi
+
+# Phase2: initiate network
+dhcp -H zylonite
+
+# Phase3: activate netconsole, broadcast everywhere
+netconsole.ip=255.255.255.255
+netconsole.active=ioe
+netconsole.port=6666
+
diff --git a/arch/arm/boards/zylonite/env/bin/mtd_env_override b/arch/arm/boards/zylonite/env/bin/mtd_env_override
new file mode 100644
index 0000000000..6ea253a4f0
--- /dev/null
+++ b/arch/arm/boards/zylonite/env/bin/mtd_env_override
@@ -0,0 +1,4 @@
+#!/bin/sh
+
+loadenv /dev/nand0.barebox-env
+exit $?
diff --git a/arch/arm/boards/zylonite/env/config b/arch/arm/boards/zylonite/env/config
new file mode 100644
index 0000000000..ee66e37cc3
--- /dev/null
+++ b/arch/arm/boards/zylonite/env/config
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+autoboot_timeout=3
+
+mtdparts="128k@0(TIMH)ro,128k@128k(OBMI)ro,768k@256k(barebox),256k@1024k(barebox-env),12M@1280k(kernel),38016k@13568k(root)"
+bootargs="$bootargs mtdparts=pxa3xx_nand-0:$mtdparts ubi.mtd=5 rootfstype=ubifs root=ubi0:root ro ram=64M console=ttyS0,115200"
diff --git a/arch/arm/boards/zylonite/lowlevel.c b/arch/arm/boards/zylonite/lowlevel.c
new file mode 100644
index 0000000000..9f1aa6641c
--- /dev/null
+++ b/arch/arm/boards/zylonite/lowlevel.c
@@ -0,0 +1,10 @@
+#include <common.h>
+#include <linux/sizes.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+void __naked barebox_arm_reset_vector(void)
+{
+	arm_cpu_lowlevel_init();
+	barebox_arm_entry(0x80000000, SZ_64M, NULL);
+}
diff --git a/arch/arm/boards/zylonite/zylonite.h b/arch/arm/boards/zylonite/zylonite.h
new file mode 100644
index 0000000000..d39ab72d3d
--- /dev/null
+++ b/arch/arm/boards/zylonite/zylonite.h
@@ -0,0 +1,22 @@
+/*
+ * (C) 2011 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _ZYLONITE_H_
+#define _ZYLONITE_H_
+
+
+#endif /* _ZYLONITE_H */