Merge branch 'for-next/nitrogen6x'

10 files changed, 213 insertions, 17 deletions

diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
index 8175cfee00..c5a286b4e0 100644
--- a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x128mx16.imxcfg
@@ -1,5 +1,18 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
 wm 32 MX6_MMDC_P0_MDPDC			0x00020036
-wm 32 MX6_MMDC_P0_MDSCR			0x00008000
 wm 32 MX6_MMDC_P0_MDCFG0		0x555A7974
 wm 32 MX6_MMDC_P0_MDCFG1		0xDB538F64
 wm 32 MX6_MMDC_P0_MDCFG2		0x01FF00DB
@@ -14,8 +27,8 @@ wm 32 MX6_MMDC_P0_MDSCR			0x00008033
 wm 32 MX6_MMDC_P0_MDSCR			0x00428031
 wm 32 MX6_MMDC_P0_MDSCR			0x19308030
 wm 32 MX6_MMDC_P0_MDSCR			0x04008040
-wm 32 MX6_MMDC_P0_MPZQHWCTRL	0xA1390003
-wm 32 MX6_MMDC_P1_MPZQHWCTRL	0xA1390003
+wm 32 MX6_MMDC_P0_MPZQHWCTRL		0xA1390003
+wm 32 MX6_MMDC_P1_MPZQHWCTRL		0xA1390003
 wm 32 MX6_MMDC_P0_MDREF			0x00005800
 wm 32 MX6_MMDC_P0_MPODTCTRL		0x00022227
 wm 32 MX6_MMDC_P1_MPODTCTRL		0x00022227
@@ -27,10 +40,10 @@ wm 32 MX6_MMDC_P0_MPRDDLCTL		0x45393B3E
 wm 32 MX6_MMDC_P1_MPRDDLCTL		0x403A3747
 wm 32 MX6_MMDC_P0_MPWRDLCTL		0x40434541
 wm 32 MX6_MMDC_P1_MPWRDLCTL		0x473E4A3B
-wm 32 MX6_MMDC_P0_MPWLDECTRL0	0x0011000E
-wm 32 MX6_MMDC_P0_MPWLDECTRL1	0x000E001B
-wm 32 MX6_MMDC_P1_MPWLDECTRL0	0x00190015
-wm 32 MX6_MMDC_P1_MPWLDECTRL1	0x00070018
+wm 32 MX6_MMDC_P0_MPWLDECTRL0		0x0011000E
+wm 32 MX6_MMDC_P0_MPWLDECTRL1		0x000E001B
+wm 32 MX6_MMDC_P1_MPWLDECTRL0		0x00190015
+wm 32 MX6_MMDC_P1_MPWLDECTRL1		0x00070018
 wm 32 MX6_MMDC_P0_MPMUR0		0x00000800
 wm 32 MX6_MMDC_P1_MPMUR0		0x00000800
 wm 32 MX6_MMDC_P0_MDSCR			0x00000000
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x256mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x256mx16.imxcfg
new file mode 100644
index 0000000000..4d8a715150
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/1066mhz_4x256mx16.imxcfg
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+wm 32 MX6_MMDC_P0_MDPDC 0x00020036
+wm 32 MX6_MMDC_P0_MDCFG0 0x898E7974
+wm 32 MX6_MMDC_P0_MDCFG1 0xDB538F64
+wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB
+wm 32 MX6_MMDC_P0_MDRWD 0x000026D2
+wm 32 MX6_MMDC_P0_MDOR 0x008E1023
+wm 32 MX6_MMDC_P0_MDOTC 0x09444040
+wm 32 MX6_MMDC_P0_MDPDC 0x00025576
+wm 32 MX6_MMDC_P0_MDASP 0x00000047
+wm 32 MX6_MMDC_P0_MDCTL 0x841A0000
+wm 32 MX6_MMDC_P0_MDSCR 0x04088032
+wm 32 MX6_MMDC_P0_MDSCR 0x00008033
+wm 32 MX6_MMDC_P0_MDSCR 0x00428031
+wm 32 MX6_MMDC_P0_MDSCR 0x19308030
+wm 32 MX6_MMDC_P0_MDSCR 0x04008040
+wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P0_MDREF 0x00007800
+wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P0_MPDGCTRL0 0x43040319
+wm 32 MX6_MMDC_P0_MPDGCTRL1 0x03040279
+wm 32 MX6_MMDC_P1_MPDGCTRL0 0x43040321
+wm 32 MX6_MMDC_P1_MPDGCTRL1 0x03030251
+wm 32 MX6_MMDC_P0_MPRDDLCTL 0x4d434248
+wm 32 MX6_MMDC_P1_MPRDDLCTL 0x42413c4d
+wm 32 MX6_MMDC_P0_MPWRDLCTL 0x34424543
+wm 32 MX6_MMDC_P1_MPWRDLCTL 0x49324933
+wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001a0017
+wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x001F001F
+wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x00170027
+wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x000a001f
+wm 32 MX6_MMDC_P0_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P1_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P0_MDSCR 0x00000000
+wm 32 MX6_MMDC_P0_MAPSR 0x00011006
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x128mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x128mx16.imxcfg
new file mode 100644
index 0000000000..936a2f54bf
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x128mx16.imxcfg
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+wm 32 MX6_MMDC_P0_MDPDC 0x0002002D
+wm 32 MX6_MMDC_P0_MDCFG0 0x40435323
+wm 32 MX6_MMDC_P0_MDCFG1 0xB66E8D63
+wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB
+wm 32 MX6_MMDC_P0_MDRWD 0x000026D2
+wm 32 MX6_MMDC_P0_MDOR 0x00431023
+wm 32 MX6_MMDC_P0_MDOTC 0x00333030
+wm 32 MX6_MMDC_P0_MDPDC 0x0002556D
+wm 32 MX6_MMDC_P0_MDASP 0x00000027
+wm 32 MX6_MMDC_P0_MDCTL 0x831A0000
+wm 32 MX6_MMDC_P0_MDSCR 0x04008032
+wm 32 MX6_MMDC_P0_MDSCR 0x00008033
+wm 32 MX6_MMDC_P0_MDSCR 0x00048031
+wm 32 MX6_MMDC_P0_MDSCR 0x13208030
+wm 32 MX6_MMDC_P0_MDSCR 0x04008040
+wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P0_MDREF 0x00005800
+wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P0_MPDGCTRL0 0x420F020F
+wm 32 MX6_MMDC_P0_MPDGCTRL1 0x01760175
+wm 32 MX6_MMDC_P1_MPDGCTRL0 0x41640171
+wm 32 MX6_MMDC_P1_MPDGCTRL1 0x015E0160
+wm 32 MX6_MMDC_P0_MPRDDLCTL 0x45464B4A
+wm 32 MX6_MMDC_P1_MPRDDLCTL 0x49484A46
+wm 32 MX6_MMDC_P0_MPWRDLCTL 0x40402E32
+wm 32 MX6_MMDC_P1_MPWRDLCTL 0x3A3A3231
+wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x003A003A
+wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x0030002F
+wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x002F0038
+wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00270039
+wm 32 MX6_MMDC_P0_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P1_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P0_MDSCR 0x00000000
+wm 32 MX6_MMDC_P0_MAPSR 0x00011006
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x256mx16.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x256mx16.imxcfg
new file mode 100644
index 0000000000..09c855544d
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/800mhz_4x256mx16.imxcfg
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+wm 32 MX6_MMDC_P0_MDPDC 0x0002002D
+wm 32 MX6_MMDC_P0_MDCFG0 0x696C5323
+wm 32 MX6_MMDC_P0_MDCFG1 0xB66E8D63
+wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB
+wm 32 MX6_MMDC_P0_MDRWD 0x000026D2
+wm 32 MX6_MMDC_P0_MDOR 0x006C1023
+wm 32 MX6_MMDC_P0_MDOTC 0x00333030
+wm 32 MX6_MMDC_P0_MDPDC 0x0002556D
+wm 32 MX6_MMDC_P0_MDASP 0x00000047
+wm 32 MX6_MMDC_P0_MDCTL 0x841A0000
+wm 32 MX6_MMDC_P0_MDSCR 0x04008032
+wm 32 MX6_MMDC_P0_MDSCR 0x00008033
+wm 32 MX6_MMDC_P0_MDSCR 0x00048031
+wm 32 MX6_MMDC_P0_MDSCR 0x13208030
+wm 32 MX6_MMDC_P0_MDSCR 0x04008040
+wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xA1390003
+wm 32 MX6_MMDC_P0_MDREF 0x00007800
+wm 32 MX6_MMDC_P0_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P1_MPODTCTRL 0x00022227
+wm 32 MX6_MMDC_P0_MPDGCTRL0 0x42350231
+wm 32 MX6_MMDC_P0_MPDGCTRL1 0x021A0218
+wm 32 MX6_MMDC_P1_MPDGCTRL0 0x42350231
+wm 32 MX6_MMDC_P1_MPDGCTRL1 0x021A0218
+wm 32 MX6_MMDC_P0_MPRDDLCTL 0x4B4B4E49
+wm 32 MX6_MMDC_P1_MPRDDLCTL 0x4B4B4E49
+wm 32 MX6_MMDC_P0_MPWRDLCTL 0x3F3F3035
+wm 32 MX6_MMDC_P1_MPWRDLCTL 0x3F3F3035
+wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x0040003C
+wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x0032003E
+wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x0040003C
+wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x0032003E
+wm 32 MX6_MMDC_P0_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P1_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P0_MDSCR 0x00000000
+wm 32 MX6_MMDC_P0_MAPSR 0x00011006
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg
deleted file mode 100644
index 55adb60557..0000000000
--- a/arch/arm/boards/boundarydevices-nitrogen6x/clocks.imxcfg
+++ /dev/null
@@ -1,7 +0,0 @@
-wm 32 MX6_CCM_CCGR0		0x00C03F3F
-wm 32 MX6_CCM_CCGR1		0x0030FC03
-wm 32 MX6_CCM_CCGR2		0x0FFFC000
-wm 32 MX6_CCM_CCGR3		0x3FF00000
-wm 32 MX6_CCM_CCGR4		0x00FFF300
-wm 32 MX6_CCM_CCGR5		0x0F0000C3
-wm 32 MX6_CCM_CCGR6		0x000003FF
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
index 76fad119a6..0773f4d276 100644
--- a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-1g.imxcfg
@@ -7,5 +7,4 @@ dcdofs 0x400
 #include <mach/imx6-ccm-regs.h>
 
 #include "ram-base.imxcfg"
-#include "1066mhz_4x128mx16.imxcfg"
-#include "clocks.imxcfg"
+#include "800mhz_4x128mx16.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-2g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-2g.imxcfg
new file mode 100644
index 0000000000..6622c517fa
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6dl-2g.imxcfg
@@ -0,0 +1,10 @@
+soc imx6
+loadaddr 0x20000000
+dcdofs 0x400
+
+#include <mach/imx6-ddr-regs.h>
+#include <mach/imx6dl-ddr-regs.h>
+#include <mach/imx6-ccm-regs.h>
+
+#include "ram-base.imxcfg"
+#include "800mhz_4x256mx16.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
index ee3145bc32..bd4134f8a9 100644
--- a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg
@@ -8,4 +8,3 @@ dcdofs 0x400
 
 #include "ram-base.imxcfg"
 #include "1066mhz_4x128mx16.imxcfg"
-#include "clocks.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-2g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-2g.imxcfg
new file mode 100644
index 0000000000..89aa21c300
--- /dev/null
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/flash-header-nitrogen6q-2g.imxcfg
@@ -0,0 +1,10 @@
+soc imx6
+loadaddr 0x20000000
+dcdofs 0x400
+
+#include <mach/imx6-ddr-regs.h>
+#include <mach/imx6q-ddr-regs.h>
+#include <mach/imx6-ccm-regs.h>
+
+#include "ram-base.imxcfg"
+#include "1066mhz_4x256mx16.imxcfg"
diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c b/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c
index 5371be6313..a32e29c3e4 100644
--- a/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c
+++ b/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c
@@ -17,6 +17,17 @@ ENTRY_FUNCTION(start_imx6q_nitrogen6x_1g, r0, r1, r2)
 	barebox_arm_entry(0x10000000, SZ_1G, fdt);
 }
 
+ENTRY_FUNCTION(start_imx6q_nitrogen6x_2g, r0, r1, r2)
+{
+	void *fdt;
+
+	imx6_cpu_lowlevel_init();
+
+	fdt = __dtb_imx6q_nitrogen6x_start - get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_2G, fdt);
+}
+
 extern char __dtb_imx6dl_nitrogen6x_start[];
 
 ENTRY_FUNCTION(start_imx6dl_nitrogen6x_1g, r0, r1, r2)
@@ -29,3 +40,14 @@ ENTRY_FUNCTION(start_imx6dl_nitrogen6x_1g, r0, r1, r2)
 
 	barebox_arm_entry(0x10000000, SZ_1G, fdt);
 }
+
+ENTRY_FUNCTION(start_imx6dl_nitrogen6x_2g, r0, r1, r2)
+{
+	void *fdt;
+
+	imx6_cpu_lowlevel_init();
+
+	fdt = __dtb_imx6dl_nitrogen6x_start - get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_2G, fdt);
+}