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author | Jan Weitzel <j.weitzel@phytec.de> | 2012-08-14 09:04:33 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-08-14 22:01:33 +0200 |
commit | 4d5850ff9e19f0170399849b1ee55ac5051ca70e (patch) | |
tree | 6220bb5d2dc26567689fccca6c48f2bbbdf8dcfa /arch/arm/boards | |
parent | 054085bfba59485a780a7beaf1b8744764f90cd7 (diff) | |
download | barebox-4d5850ff9e19f0170399849b1ee55ac5051ca70e.tar.gz barebox-4d5850ff9e19f0170399849b1ee55ac5051ca70e.tar.xz |
OMAP4460: clock init
Change clock init to allow early gpio access. Add support for 4460 clocks.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards')
-rw-r--r-- | arch/arm/boards/panda/mux.c | 8 | ||||
-rw-r--r-- | arch/arm/boards/pcm049/lowlevel.c | 11 | ||||
-rw-r--r-- | arch/arm/boards/pcm049/mux.c | 8 | ||||
-rw-r--r-- | arch/arm/boards/phycard-a-xl2/lowlevel.c | 9 | ||||
-rw-r--r-- | arch/arm/boards/phycard-a-xl2/mux.c | 8 |
5 files changed, 39 insertions, 5 deletions
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c index 310e43372f..3783006ad6 100644 --- a/arch/arm/boards/panda/mux.c +++ b/arch/arm/boards/panda/mux.c @@ -3,6 +3,7 @@ #include <io.h> #include <mach/omap4-silicon.h> #include <mach/omap4-mux.h> +#include <mach/omap4-clock.h> static const struct pad_conf_entry core_padconf_array[] = { { GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1 /* sdmmc2_dat0 */ }, @@ -245,4 +246,11 @@ void set_muxconf_regs(void) omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); + + /* gpio_wk7 is used for controlling TPS on 4460 */ + if (omap4_revision() >= OMAP4460_ES1_0) { + writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ); + /* Enable GPIO-1 clocks before TPS initialization */ + omap4_enable_gpio1_wup_clocks(); + } } diff --git a/arch/arm/boards/pcm049/lowlevel.c b/arch/arm/boards/pcm049/lowlevel.c index 5e591faa64..65a29ec8ae 100644 --- a/arch/arm/boards/pcm049/lowlevel.c +++ b/arch/arm/boards/pcm049/lowlevel.c @@ -48,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = { static void noinline pcm049_init_lowlevel(void) { struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400; - struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; + struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; + struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920; struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2; struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2; @@ -64,7 +65,11 @@ static void noinline pcm049_init_lowlevel(void) writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); /* Configure all DPLL's at 100% OPP */ - omap4_configure_mpu_dpll(&mpu); + if (omap4_revision() < OMAP4460_ES1_0) + omap4_configure_mpu_dpll(&mpu44xx); + else + omap4_configure_mpu_dpll(&mpu4460); + omap4_configure_iva_dpll(&iva); omap4_configure_per_dpll(&per); omap4_configure_abe_dpll(&abe); @@ -90,7 +95,7 @@ void board_init_lowlevel(void) return; r = 0x4030d000; - __asm__ __volatile__("mov sp, %0" : : "r"(r)); + __asm__ __volatile__("mov sp, %0" : : "r"(r)); pcm049_init_lowlevel(); } diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c index a7a77b5adc..04e1d67214 100644 --- a/arch/arm/boards/pcm049/mux.c +++ b/arch/arm/boards/pcm049/mux.c @@ -3,6 +3,7 @@ #include <io.h> #include <mach/omap4-silicon.h> #include <mach/omap4-mux.h> +#include <mach/omap4-clock.h> static const struct pad_conf_entry core_padconf_array[] = { {GPMC_AD0, (IEN | PTD | DIS | M0)}, /* gpmc_ad0 */ @@ -242,4 +243,11 @@ void set_muxconf_regs(void) omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); + + /* gpio_182 is used for controlling TPS on 4460 */ + if (omap4_revision() >= OMAP4460_ES1_0) { + writew(M3, OMAP44XX_CONTROL_PADCONF_CORE + FREF_CLK2_OUT); + /* Enable GPIO-1 clocks before TPS initialization */ + omap4_enable_gpio_clocks(); + } } diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c b/arch/arm/boards/phycard-a-xl2/lowlevel.c index 2aa79a84c6..38f80c9733 100644 --- a/arch/arm/boards/phycard-a-xl2/lowlevel.c +++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c @@ -48,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = { static noinline void pcaaxl2_init_lowlevel(void) { struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400; - struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; + struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000; + struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920; struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2; struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2; @@ -64,7 +65,11 @@ static noinline void pcaaxl2_init_lowlevel(void) writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); /* Configure all DPLL's at 100% OPP */ - omap4_configure_mpu_dpll(&mpu); + if (omap4_revision() < OMAP4460_ES1_0) + omap4_configure_mpu_dpll(&mpu44xx); + else + omap4_configure_mpu_dpll(&mpu4460); + omap4_configure_iva_dpll(&iva); omap4_configure_per_dpll(&per); omap4_configure_abe_dpll(&abe); diff --git a/arch/arm/boards/phycard-a-xl2/mux.c b/arch/arm/boards/phycard-a-xl2/mux.c index 179e6b67ab..dc605e38b4 100644 --- a/arch/arm/boards/phycard-a-xl2/mux.c +++ b/arch/arm/boards/phycard-a-xl2/mux.c @@ -3,6 +3,7 @@ #include <io.h> #include <mach/omap4-silicon.h> #include <mach/omap4-mux.h> +#include <mach/omap4-clock.h> static const struct pad_conf_entry core_padconf_array[] = { {GPMC_AD0, (IEN | PTD | DIS | M0)}, /* gpmc_ad0 */ @@ -242,4 +243,11 @@ void set_muxconf_regs(void) omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array, ARRAY_SIZE(wkup_padconf_array)); + + /* gpio_wk7 is used for controlling TPS on 4460 */ + if (omap4_revision() >= OMAP4460_ES1_0) { + writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ); + /* Enable GPIO-1 clocks before TPS initialization */ + omap4_enable_gpio1_wup_clocks(); + } } |