Merge branch 'for-next/imx'

27 files changed, 48 insertions, 379 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 5b0a6d67bd..edc1bb51e8 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -64,7 +64,6 @@ obj-$(CONFIG_MACH_MMCCPU)			+= mmccpu/
 obj-$(CONFIG_MACH_MX23EVK)			+= freescale-mx23-evk/
 obj-$(CONFIG_MACH_MX28EVK)			+= freescale-mx28-evk/
 obj-$(CONFIG_MACH_MX31MOBOARD)			+= mx31moboard/
-obj-$(CONFIG_MACH_MX6Q_ARM2)			+= freescale-mx6-arm2/
 obj-$(CONFIG_MACH_NESO)				+= guf-neso/
 obj-$(CONFIG_MACH_NOMADIK_8815NHK)		+= nhk8815/
 obj-$(CONFIG_MACH_NVIDIA_BEAVER)		+= nvidia-beaver/
diff --git a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
index 4edbbe4b8a..7ae8a18e06 100644
--- a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c
@@ -37,6 +37,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 
 	arm_cpu_lowlevel_init();
 
+	arm_setup_stack(MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 12);
+
 	/* restart the MPLL and wait until it's stable */
 	writel(readl(MX25_CCM_BASE_ADDR + MX25_CCM_CCTL) | (1 << 27),
 			MX25_CCM_BASE_ADDR + MX25_CCM_CCTL);
@@ -127,12 +129,9 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 	writeb(0xda, MX25_CSD0_BASE_ADDR + 0x1000000);
 	writel(0x82216080, MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0);
 
-	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) {
-		/* setup a stack to be able to call imx25_barebox_boot_nand_external() */
-		arm_setup_stack(MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 12);
-
+	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND))
 		imx25_barebox_boot_nand_external(0);
-	}
+
 out:
 	imx25_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
index f8e3c23540..b3504832d7 100644
--- a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
+++ b/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S
@@ -76,6 +76,8 @@ barebox_arm_reset_vector:
 
 	bl		arm_cpu_lowlevel_init
 
+	ldr	sp, =MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 4;
+
 	/* ahb lite ip interface */
 	writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0)
 	writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1)
@@ -124,9 +126,6 @@ barebox_arm_reset_vector:
 	sdram_init
 
 #ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND
-	/* Setup a temporary stack in SDRAM */
-	ldr	sp, =MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 4;
-
 	mov	r0, #0
 	b	imx27_barebox_boot_nand_external
 #endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */
diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
index 4788ae2e42..83c25feb41 100644
--- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c
@@ -43,6 +43,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 
 	arm_cpu_lowlevel_init();
 
+	arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8);
+
 	r = get_cr();
 	r |= CR_Z; /* Flow prediction (Z) */
 	r |= CR_U; /* unaligned accesses  */
@@ -137,9 +139,6 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 		r |= 0x1 << 28;
 		writel(r, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4);
 
-		/* setup a stack to be able to call imx35_barebox_boot_nand_external() */
-		arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8);
-
 		imx35_barebox_boot_nand_external(0);
 	}
 
diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c b/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
index 7a85b489d2..ad89076329 100644
--- a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
@@ -6,5 +6,6 @@
 void __naked barebox_arm_reset_vector(void)
 {
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0x20000000 - 16);
 	imx51_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
index 4ca4c82d32..a5d54e8d01 100644
--- a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S
@@ -17,6 +17,7 @@
  *
  */
 
+#include <linux/sizes.h>
 #include <asm-generic/memory_layout.h>
 #include <mach/imx25-regs.h>
 #include <mach/imx-pll.h>
@@ -71,6 +72,9 @@ barebox_arm_reset_vector:
 	writel(0x000FDFFF, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR2)
 	writel(0x0000FEFF, MX25_CCM_BASE_ADDR + MX25_CCM_MCR)
 
+	/* Setup a temporary stack in SRAM */
+	ldr	sp, =MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 4
+
 	/* Skip SDRAM initialization if we run from RAM */
 	cmp	pc, #0x80000000
 	bls	1f
@@ -99,9 +103,6 @@ barebox_arm_reset_vector:
 
 #ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND
 
-	/* Setup a temporary stack in SRAM */
-	ldr	sp, =MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 4
-
 	mov	r0, #0
 	b	imx25_barebox_boot_nand_external
 #endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */
diff --git a/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S b/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S
index 45f39921ec..e79b96dd2c 100644
--- a/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S
@@ -54,6 +54,8 @@ barebox_arm_reset_vector:
 
 	bl arm_cpu_lowlevel_init
 
+	ldr	sp, =MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 4;
+
 	/* ahb lite ip interface */
 	writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0)
 	writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1)
diff --git a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
index 6d37f35a2e..0f9e813191 100644
--- a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
+++ b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S
@@ -60,6 +60,9 @@ CCM_BASE_ADDR_W:	.word	MX35_CCM_BASE_ADDR
 barebox_arm_reset_vector:
 	bl	arm_cpu_lowlevel_init
 
+	/* Setup a temporary stack in internal SRAM */
+	ldr	sp, =MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 4
+
 	mrc	15, 0, r1, c1, c0, 0
 
 	mrc	15, 0, r0, c1, c0, 1
@@ -155,9 +158,6 @@ barebox_arm_reset_vector:
 	str	r3, [r0, #0x30]
 
 #ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND
-	/* Setup a temporary stack in internal SRAM */
-	ldr	sp, =MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 4
-
 	mov	r0, #0
 	b	imx35_barebox_boot_nand_external
 #endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */
diff --git a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
index 1b9ba16ef6..0f453f3367 100644
--- a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
+++ b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
@@ -11,6 +11,7 @@ ENTRY_FUNCTION(start_imx51_babbage, r0, r1, r2)
 	void *fdt;
 
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0x20000000 - 16);
 
 	fdt = __dtb_imx51_babbage_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx53-qsb/board.c b/arch/arm/boards/freescale-mx53-qsb/board.c
index f65b55658f..dd2abb5f5d 100644
--- a/arch/arm/boards/freescale-mx53-qsb/board.c
+++ b/arch/arm/boards/freescale-mx53-qsb/board.c
@@ -85,10 +85,6 @@ static int loco_late_init(void)
 	    !of_machine_is_compatible("fsl,imx53-qsrb"))
 		return 0;
 
-	device_detect_by_name("mmc0");
-
-	devfs_add_partition("mmc0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");
-
 	mc34708 = mc13xxx_get();
 	if (mc34708) {
 		unsigned int val;
diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
index aff6e3bc54..ce6a290ca2 100644
--- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
@@ -12,6 +12,7 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2)
 	void *fdt;
 
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 
 	fdt = __dtb_imx53_qsb_start - get_runtime_offset();
 
@@ -25,6 +26,7 @@ ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2)
 	void *fdt;
 
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 
 	fdt = __dtb_imx53_qsrb_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx53-smd/lowlevel.c b/arch/arm/boards/freescale-mx53-smd/lowlevel.c
index 306db09acf..5ad0312e82 100644
--- a/arch/arm/boards/freescale-mx53-smd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-smd/lowlevel.c
@@ -6,5 +6,6 @@
 void __naked barebox_arm_reset_vector(void)
 {
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 	imx53_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
index 487a9fd899..3545a1c352 100644
--- a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
@@ -11,6 +11,7 @@ ENTRY_FUNCTION(start_imx53_vmx53, r0, r1, r2)
 	void *fdt;
 
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 
 	fdt = __dtb_imx53_voipac_bsb_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx6-arm2/Makefile b/arch/arm/boards/freescale-mx6-arm2/Makefile
deleted file mode 100644
index 01c7a259e9..0000000000
--- a/arch/arm/boards/freescale-mx6-arm2/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-obj-y += board.o
-lwl-y += lowlevel.o
diff --git a/arch/arm/boards/freescale-mx6-arm2/board.c b/arch/arm/boards/freescale-mx6-arm2/board.c
deleted file mode 100644
index 3d5576c065..0000000000
--- a/arch/arm/boards/freescale-mx6-arm2/board.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Copyright (C) 2012 Sascha Hauer, Pengutronix
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <init.h>
-#include <environment.h>
-#include <mach/imx6-regs.h>
-#include <fec.h>
-#include <gpio.h>
-#include <asm/armlinux.h>
-#include <generated/mach-types.h>
-#include <partition.h>
-#include <linux/phy.h>
-#include <asm/io.h>
-#include <asm/mmu.h>
-#include <mach/generic.h>
-#include <linux/sizes.h>
-#include <mach/imx6.h>
-#include <mach/devices-imx6.h>
-#include <mach/iomux-mx6.h>
-
-static iomux_v3_cfg_t arm2_pads[] = {
-	/* UART1 */
-	MX6Q_PAD_KEY_COL0__UART4_TXD,
-	MX6Q_PAD_KEY_ROW0__UART4_RXD,
-
-	MX6Q_PAD_SD1_CLK__USDHC1_CLK,
-	MX6Q_PAD_SD1_CMD__USDHC1_CMD,
-	MX6Q_PAD_SD1_DAT0__USDHC1_DAT0,
-	MX6Q_PAD_SD1_DAT1__USDHC1_DAT1,
-	MX6Q_PAD_SD1_DAT2__USDHC1_DAT2,
-	MX6Q_PAD_SD1_DAT3__USDHC1_DAT3,
-
-	MX6Q_PAD_SD2_CLK__USDHC2_CLK,
-	MX6Q_PAD_SD2_CMD__USDHC2_CMD,
-	MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
-	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
-	MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
-	MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
-
-	MX6Q_PAD_SD3_CLK__USDHC3_CLK,
-	MX6Q_PAD_SD3_CMD__USDHC3_CMD,
-	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
-	MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
-	MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
-	MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
-	MX6Q_PAD_SD3_DAT4__USDHC3_DAT4,
-	MX6Q_PAD_SD3_DAT5__USDHC3_DAT5,
-	MX6Q_PAD_SD3_DAT6__USDHC3_DAT6,
-	MX6Q_PAD_SD3_DAT7__USDHC3_DAT7,
-	MX6Q_PAD_GPIO_18__USDHC3_VSELECT,
-
-	MX6Q_PAD_SD4_CLK__USDHC4_CLK,
-	MX6Q_PAD_SD4_CMD__USDHC4_CMD,
-	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
-	MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
-	MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
-	MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
-	MX6Q_PAD_SD4_DAT4__USDHC4_DAT4,
-	MX6Q_PAD_SD4_DAT5__USDHC4_DAT5,
-	MX6Q_PAD_SD4_DAT6__USDHC4_DAT6,
-	MX6Q_PAD_SD4_DAT7__USDHC4_DAT7,
-
-	MX6Q_PAD_KEY_COL1__ENET_MDIO,
-	MX6Q_PAD_KEY_COL2__ENET_MDC,
-	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
-	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
-	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
-	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
-	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
-	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
-	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
-	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
-	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
-	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
-	MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
-	MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
-	MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
-	MX6Q_PAD_GPIO_0__CCM_CLKO,
-	MX6Q_PAD_GPIO_3__CCM_CLKO2,
-};
-
-static int arm2_mem_init(void)
-{
-	arm_add_mem_device("ram0", 0x10000000, SZ_2G);
-
-	return 0;
-}
-mem_initcall(arm2_mem_init);
-
-static void mx6_rgmii_rework(struct phy_device *dev)
-{
-	u16 val;
-
-	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-	phy_write(dev, 0xd, 0x7);
-	phy_write(dev, 0xe, 0x8016);
-	phy_write(dev, 0xd, 0x4007);
-
-	val = phy_read(dev, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(dev, 0xe, val);
-
-	/* introduce tx clock delay */
-	phy_write(dev, 0x1d, 0x5);
-
-	val = phy_read(dev, 0x1e);
-	val |= 0x0100;
-	phy_write(dev, 0x1e, val);
-}
-
-static struct fec_platform_data fec_info = {
-	.xcv_type = PHY_INTERFACE_MODE_RGMII,
-	.phy_init = mx6_rgmii_rework,
-	.phy_addr = 0,
-};
-
-static int arm2_devices_init(void)
-{
-	imx6_add_mmc3(NULL);
-
-	imx6_add_fec(&fec_info);
-
-	armlinux_set_architecture(3837);
-
-	devfs_add_partition("disk0", 0, SZ_1M, DEVFS_PARTITION_FIXED, "self0");
-	devfs_add_partition("disk0", SZ_1M + SZ_1M, SZ_512K, DEVFS_PARTITION_FIXED, "env0");
-
-	return 0;
-}
-
-device_initcall(arm2_devices_init);
-
-static int arm2_console_init(void)
-{
-	mxc_iomux_v3_setup_multiple_pads(arm2_pads, ARRAY_SIZE(arm2_pads));
-
-	barebox_set_model("Freescale i.MX6 Armadillo2");
-	barebox_set_hostname("armadillo2");
-
-	imx6_add_uart3();
-
-	return 0;
-}
-console_initcall(arm2_console_init);
diff --git a/arch/arm/boards/freescale-mx6-arm2/env/config b/arch/arm/boards/freescale-mx6-arm2/env/config
deleted file mode 100644
index 0ab5bdf0e0..0000000000
--- a/arch/arm/boards/freescale-mx6-arm2/env/config
+++ /dev/null
@@ -1,47 +0,0 @@
-#!/bin/sh
-
-machine=armadillo2
-serverip=
-user=
-
-# use 'dhcp' to do dhcp in barebox and in kernel
-# use 'none' if you want to skip kernel ip autoconfiguration
-ip=dhcp
-
-# or set your networking parameters here
-#eth0.ipaddr=a.b.c.d
-#eth0.netmask=a.b.c.d
-#eth0.gateway=a.b.c.d
-#eth0.serverip=a.b.c.d
-
-# can be either 'nfs', 'tftp', 'nor' or 'nand'
-kernel_loc=tftp
-# can be either 'net', 'nor', 'nand' or 'initrd'
-rootfs_loc=disk
-
-# can be either 'jffs2' or 'ubifs'
-rootfs_type=ubifs
-rootfsimage=root-$machine.$rootfs_type
-
-# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
-kernelimage=zImage-$machine
-
-if [ -n $user ]; then
-	kernelimage="$user"-"$kernelimage"
-	nfsroot="$serverip:/home/$user/nfsroot/$machine"
-	rootfsimage="$user"-"$rootfsimage"
-else
-	nfsroot="$serverip:/path/to/nfs/root"
-fi
-
-autoboot_timeout=3
-
-bootargs="console=ttymxc2,115200"
-
-disk_parts="1M(barebox)ro,3M(bareboxenv),4M(kernel),-(root)"
-
-rootfs_part_linux_dev=sda1
-rootfs_type=ext2
-
-# set a fancy prompt (if support is compiled in)
-PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/arch/arm/boards/freescale-mx6-arm2/flash-header.imxcfg b/arch/arm/boards/freescale-mx6-arm2/flash-header.imxcfg
deleted file mode 100644
index 403d184834..0000000000
--- a/arch/arm/boards/freescale-mx6-arm2/flash-header.imxcfg
+++ /dev/null
@@ -1,122 +0,0 @@
-soc imx6
-loadaddr 0x10000000
-dcdofs 0x400
-
-wm 32 0x020e05a8 0x00000030
-wm 32 0x020e05b0 0x00000030
-wm 32 0x020e0524 0x00000030
-wm 32 0x020e051c 0x00000030
-
-wm 32 0x020e0518 0x00000030
-wm 32 0x020e050c 0x00000030
-wm 32 0x020e05b8 0x00000030
-wm 32 0x020e05c0 0x00000030
-
-wm 32 0x020e05ac 0x00020030
-wm 32 0x020e05b4 0x00020030
-wm 32 0x020e0528 0x00020030
-wm 32 0x020e0520 0x00020030
-
-wm 32 0x020e0514 0x00020030
-wm 32 0x020e0510 0x00020030
-wm 32 0x020e05bc 0x00020030
-wm 32 0x020e05c4 0x00020030
-
-wm 32 0x020e056c 0x00020030
-wm 32 0x020e0578 0x00020030
-wm 32 0x020e0588 0x00020030
-wm 32 0x020e0594 0x00020030
-
-wm 32 0x020e057c 0x00020030
-wm 32 0x020e0590 0x00003000
-wm 32 0x020e0598 0x00003000
-wm 32 0x020e058c 0x00000000
-
-wm 32 0x020e059c 0x00003030
-wm 32 0x020e05a0 0x00003030
-wm 32 0x020e0784 0x00000030
-wm 32 0x020e0788 0x00000030
-
-wm 32 0x020e0794 0x00000030
-wm 32 0x020e079c 0x00000030
-wm 32 0x020e07a0 0x00000030
-wm 32 0x020e07a4 0x00000030
-
-wm 32 0x020e07a8 0x00000030
-wm 32 0x020e0748 0x00000030
-wm 32 0x020e074c 0x00000030
-wm 32 0x020e0750 0x00020000
-
-wm 32 0x020e0758 0x00000000
-wm 32 0x020e0774 0x00020000
-wm 32 0x020e078c 0x00000030
-wm 32 0x020e0798 0x000C0000
-
-wm 32 0x021b081c 0x33333333
-wm 32 0x021b0820 0x33333333
-wm 32 0x021b0824 0x33333333
-wm 32 0x021b0828 0x33333333
-
-wm 32 0x021b481c 0x33333333
-wm 32 0x021b4820 0x33333333
-wm 32 0x021b4824 0x33333333
-wm 32 0x021b4828 0x33333333
-
-wm 32 0x021b0018 0x00081740
-
-wm 32 0x021b001c 0x00008000
-wm 32 0x021b000c 0x555A7975
-wm 32 0x021b0010 0xFF538E64
-wm 32 0x021b0014 0x01FF00DB
-wm 32 0x021b002c 0x000026D2
-
-wm 32 0x021b0030 0x005B0E21
-wm 32 0x021b0008 0x09444040
-wm 32 0x021b0004 0x00025576
-wm 32 0x021b0040 0x00000027
-wm 32 0x021b0000 0xC31A0000
-
-wm 32 0x021b001c 0x04088032
-wm 32 0x021b001c 0x0408803A
-wm 32 0x021b001c 0x00008033
-wm 32 0x021b001c 0x0000803B
-wm 32 0x021b001c 0x00428031
-wm 32 0x021b001c 0x00428039
-wm 32 0x021b001c 0x09408030
-wm 32 0x021b001c 0x09408038
-
-wm 32 0x021b001c 0x04008040
-wm 32 0x021b001c 0x04008048
-wm 32 0x021b0800 0xA1380003
-wm 32 0x021b4800 0xA1380003
-wm 32 0x021b0020 0x00005800
-wm 32 0x021b0818 0x00022227
-wm 32 0x021b4818 0x00022227
-
-wm 32 0x021b083c 0x434B0350
-wm 32 0x021b0840 0x034C0359
-wm 32 0x021b483c 0x434B0350
-wm 32 0x021b4840 0x03650348
-wm 32 0x021b0848 0x4436383B
-wm 32 0x021b4848 0x39393341
-wm 32 0x021b0850 0x35373933
-wm 32 0x021b4850 0x48254A36
-
-wm 32 0x021b080c 0x001F001F
-wm 32 0x021b0810 0x001F001F
-
-wm 32 0x021b480c 0x00440044
-wm 32 0x021b4810 0x00440044
-
-wm 32 0x021b08b8 0x00000800
-wm 32 0x021b48b8 0x00000800
-
-wm 32 0x021b001c 0x00000000
-wm 32 0x021b0404 0x00011006
-
-/* enable AXI cache for VDOA/VPU/IPU */
-wm 32 0x020e0010 0xf00000ff
-
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-wm 32 0x020e0018 0x007f007f
-wm 32 0x020e001c 0x007f007f
diff --git a/arch/arm/boards/freescale-mx6-arm2/lowlevel.c b/arch/arm/boards/freescale-mx6-arm2/lowlevel.c
deleted file mode 100644
index f833893335..0000000000
--- a/arch/arm/boards/freescale-mx6-arm2/lowlevel.c
+++ /dev/null
@@ -1,11 +0,0 @@
-#include <common.h>
-#include <linux/sizes.h>
-#include <asm/barebox-arm-head.h>
-#include <asm/barebox-arm.h>
-#include <mach/generic.h>
-
-void __naked barebox_arm_reset_vector(void)
-{
-	imx6_cpu_lowlevel_init();
-	barebox_arm_entry(0x10000000, SZ_2G, NULL);
-}
diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c
index 6fc90fbbdc..bcd2a24f8f 100644
--- a/arch/arm/boards/guf-cupid/lowlevel.c
+++ b/arch/arm/boards/guf-cupid/lowlevel.c
@@ -313,9 +313,6 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 		r0 |= 0x1 << 28;
 		writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4);
 
-		/* setup a stack to be able to call imx35_barebox_boot_nand_external() */
-		arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8);
-
 		imx35_barebox_boot_nand_external(0);
 	}
 
diff --git a/arch/arm/boards/guf-neso/lowlevel.c b/arch/arm/boards/guf-neso/lowlevel.c
index 2828359598..98512a976c 100644
--- a/arch/arm/boards/guf-neso/lowlevel.c
+++ b/arch/arm/boards/guf-neso/lowlevel.c
@@ -39,6 +39,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 
 	arm_cpu_lowlevel_init();
 
+	arm_setup_stack(MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 8);
+
 	/* ahb lite ip interface */
 	writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0);
 	writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1);
@@ -86,12 +88,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 			ESDCTL0_BL | ESDCTL0_SMODE_NORMAL,
 			MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0);
 
-	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) {
-		/* setup a stack to be able to call imx27_barebox_boot_nand_external() */
-		arm_setup_stack(MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 8);
-
+	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND))
 		imx27_barebox_boot_nand_external(0);
-	}
 
 out:
 	imx27_barebox_entry(NULL);
diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c
index 0c46ade9fc..ded7a3797e 100644
--- a/arch/arm/boards/guf-vincell/board.c
+++ b/arch/arm/boards/guf-vincell/board.c
@@ -29,6 +29,7 @@
 #include <io.h>
 #include <i2c/i2c.h>
 #include <linux/clk.h>
+#include <usb/fsl_usb2.h>
 
 #include <generated/mach-types.h>
 
@@ -42,6 +43,7 @@
 #include <mach/bbu.h>
 #include <mach/imx-flash-header.h>
 #include <mach/imx5.h>
+#include <mach/usb.h>
 
 #include <asm/armlinux.h>
 #include <asm/mmu.h>
@@ -265,6 +267,11 @@ static struct i2c_board_info i2c_devices[] = {
 	},
 };
 
+static struct fsl_usb2_platform_data usb_pdata = {
+	.operating_mode	= FSL_USB2_DR_DEVICE,
+	.phy_mode	= FSL_USB2_PHY_UTMI,
+};
+
 static int vincell_devices_init(void)
 {
 	writel(0, MX53_M4IF_BASE_ADDR + 0xc);
@@ -280,6 +287,9 @@ static int vincell_devices_init(void)
 	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
 	imx53_add_i2c0(NULL);
 
+	add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, MX53_OTG_BASE_ADDR, 0x200,
+			   IORESOURCE_MEM, &usb_pdata);
+
 	vincell_fec_reset();
 
 	armlinux_set_architecture(3297);
diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
index 00e34fba39..629529d90a 100644
--- a/arch/arm/boards/guf-vincell/lowlevel.c
+++ b/arch/arm/boards/guf-vincell/lowlevel.c
@@ -129,6 +129,7 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 	u32 r;
 
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 
 	/* Skip SDRAM initialization if we run from RAM */
 	r = get_pc();
diff --git a/arch/arm/boards/karo-tx51/lowlevel.c b/arch/arm/boards/karo-tx51/lowlevel.c
index 7a85b489d2..ad89076329 100644
--- a/arch/arm/boards/karo-tx51/lowlevel.c
+++ b/arch/arm/boards/karo-tx51/lowlevel.c
@@ -6,5 +6,6 @@
 void __naked barebox_arm_reset_vector(void)
 {
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0x20000000 - 16);
 	imx51_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/karo-tx53/lowlevel.c b/arch/arm/boards/karo-tx53/lowlevel.c
index 8adbd8d666..fdfb1b7573 100644
--- a/arch/arm/boards/karo-tx53/lowlevel.c
+++ b/arch/arm/boards/karo-tx53/lowlevel.c
@@ -8,6 +8,7 @@
 void __naked barebox_arm_reset_vector(void)
 {
 	imx5_cpu_lowlevel_init();
+	arm_setup_stack(0xf8020000 - 8);
 
 	/*
 	 * For the TX53 rev 8030 the SDRAM setup is not stable without
diff --git a/arch/arm/boards/phytec-phycore-imx31/lowlevel.c b/arch/arm/boards/phytec-phycore-imx31/lowlevel.c
index 44fc5bc765..27e275676f 100644
--- a/arch/arm/boards/phytec-phycore-imx31/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-imx31/lowlevel.c
@@ -39,6 +39,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 
 	arm_cpu_lowlevel_init();
 
+	arm_setup_stack(MX31_IRAM_BASE_ADDR + MX31_IRAM_SIZE - 12);
+
 	writel(1 << 6, MX31_IPU_CTRL_BASE_ADDR);
 
 	writel(0x074B0BF5, MX31_CCM_BASE_ADDR + MX31_CCM_CCMR);
@@ -125,12 +127,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 	writel(0x0000000c, MX31_ESDCTL_BASE_ADDR + IMX_ESDMISC);
 #endif
 
-	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) {
-		/* setup a stack to be able to call imx31_barebox_boot_nand_external() */
-		arm_setup_stack(MX31_IRAM_BASE_ADDR + MX31_IRAM_SIZE - 12);
-
+	if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND))
 		imx31_barebox_boot_nand_external(0);
-	} else {
+	else
 		imx31_barebox_entry(NULL);
-	}
 }
diff --git a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
index 919a9af3da..1ad5439c28 100644
--- a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c
@@ -49,6 +49,8 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 
 	arm_cpu_lowlevel_init();
 
+	arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8);
+
 	r = get_cr();
 	r |= CR_Z; /* Flow prediction (Z) */
 	r |= CR_U; /* unaligned accesses  */
@@ -189,9 +191,6 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 		r |= 0x1 << 28;
 		writel(r, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4);
 
-		/* setup a stack to be able to call imx35_barebox_boot_nand_external() */
-		arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8);
-
 		imx35_barebox_boot_nand_external(0);
 	}
 
diff --git a/arch/arm/boards/scb9328/lowlevel_init.S b/arch/arm/boards/scb9328/lowlevel_init.S
index 717bb90e40..73afc09b70 100644
--- a/arch/arm/boards/scb9328/lowlevel_init.S
+++ b/arch/arm/boards/scb9328/lowlevel_init.S
@@ -100,7 +100,7 @@ barebox_arm_reset_vector:
 	cmp	pc, #0x09000000
 	bhi	1f
 
-	b imx1_barebox_entry
+	b 2f
 
 1:
 
@@ -129,5 +129,7 @@ barebox_arm_reset_vector:
 	writel(0x0, 0x08223000)
 	/* Set to Normal Mode CAS 2 */
 	writel(0x810a8200, MX1_SDRAMC_BASE_ADDR + MX1_SDCTL0)
+2:
+	ldr     sp, =0x08100000 - 4;
 
 	b imx1_barebox_entry