Merge branch 'for-next/imx'

27 files changed, 454 insertions, 101 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index fb257fbfc7..9961ca8f11 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -93,6 +93,7 @@ obj-$(CONFIG_MACH_REALQ7)			+= datamodul-edm-qmx6/
 obj-$(CONFIG_MACH_RPI)				+= raspberry-pi/
 obj-$(CONFIG_MACH_SABRELITE)			+= freescale-mx6-sabrelite/
 obj-$(CONFIG_MACH_SABRESD)			+= freescale-mx6-sabresd/
+obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB)	+= freescale-mx6sx-sabresdb/
 obj-$(CONFIG_MACH_SAMA5D3XEK)			+= sama5d3xek/
 obj-$(CONFIG_MACH_SAMA5D3_XPLAINED)		+= sama5d3_xplained/
 obj-$(CONFIG_MACH_SAMA5D4_XPLAINED)		+= sama5d4_xplained/
diff --git a/arch/arm/boards/ccxmx51/lowlevel.c b/arch/arm/boards/ccxmx51/lowlevel.c
index 3e67b314a7..2b3dc42e87 100644
--- a/arch/arm/boards/ccxmx51/lowlevel.c
+++ b/arch/arm/boards/ccxmx51/lowlevel.c
@@ -1,11 +1,12 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm.h>
 #include <asm/barebox-arm-head.h>
 #include <mach/imx51-regs.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 	barebox_arm_entry(MX51_CSD0_BASE_ADDR, SZ_128M, NULL);
 }
diff --git a/arch/arm/boards/efika-mx-smartbook/Makefile b/arch/arm/boards/efika-mx-smartbook/Makefile
index 0ac4693890..d00e0f6ed0 100644
--- a/arch/arm/boards/efika-mx-smartbook/Makefile
+++ b/arch/arm/boards/efika-mx-smartbook/Makefile
@@ -2,3 +2,4 @@ obj-y += board.o flash-header-imx51-genesi-efikasb.dcd.o
 lwl-y += lowlevel.o
 extra-y += flash-header-imx51-genesi-efikasb.dcd.S
 extra-y += flash-header-imx51-genesi-efikasb.dcd
+bbenv-y += defaultenv-efikasb
diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c
index 59410c1ec4..99efd666f9 100644
--- a/arch/arm/boards/efika-mx-smartbook/board.c
+++ b/arch/arm/boards/efika-mx-smartbook/board.c
@@ -17,6 +17,7 @@
 #include <bootsource.h>
 #include <partition.h>
 #include <common.h>
+#include <envfs.h>
 #include <fcntl.h>
 #include <gpio.h>
 #include <init.h>
@@ -63,16 +64,9 @@ static inline int machine_is_efikasb(void)
 	return 1;
 }
 
-static int efikamx_power_init(void)
+static void efikamx_power_init(struct mc13xxx *mc)
 {
 	unsigned int val;
-	struct mc13xxx *mc;
-
-	mc = mc13xxx_get();
-	if (!mc) {
-		printf("could not get mc13892\n");
-		return -ENODEV;
-	}
 
 	/* Write needed to Power Gate 2 register */
 	mc13xxx_reg_read(mc, MC13892_REG_POWER_MISC, &val);
@@ -177,8 +171,6 @@ static int efikamx_power_init(void)
 	mc13xxx_reg_write(mc, MC13892_REG_POWER_CTL2, val);
 
 	udelay(2500);
-
-	return 0;
 }
 
 static int efikamx_usb_init(void)
@@ -188,6 +180,8 @@ static int efikamx_usb_init(void)
 
 	barebox_set_hostname("efikasb");
 
+	mc13xxx_register_init_callback(efikamx_power_init);
+
 	gpio_direction_output(GPIO_BLUETOOTH, 0);
 	gpio_direction_output(GPIO_WIFI_ENABLE, 1);
 	gpio_direction_output(GPIO_WIFI_RESET, 0);
@@ -245,7 +239,7 @@ static int efikamx_late_init(void)
 	if (!of_machine_is_compatible("genesi,imx51-sb"))
 		return 0;
 
-	efikamx_power_init();
+	defaultenv_append_directory(defaultenv_efikasb);
 
 	gpio_direction_output(GPIO_BACKLIGHT_POWER, 1);
 
diff --git a/arch/arm/boards/efika-mx-smartbook/env/bin/lvds_init b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/bin/lvds_init
index 692392cd6c..692392cd6c 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/bin/lvds_init
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/bin/lvds_init
diff --git a/arch/arm/boards/efika-mx-smartbook/env/boot/hd-internal b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/boot/hd-internal
index 2233f14269..2233f14269 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/boot/hd-internal
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/boot/hd-internal
diff --git a/arch/arm/boards/efika-mx-smartbook/env/boot/mmc-left b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/boot/mmc-left
index da7bc0398a..da7bc0398a 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/boot/mmc-left
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/boot/mmc-left
diff --git a/arch/arm/boards/efika-mx-smartbook/env/config b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/config
index c63c6a1fa5..c63c6a1fa5 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/config
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/config
diff --git a/arch/arm/boards/efika-mx-smartbook/env/init/automount b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/init/automount
index 8cb5eaf792..8cb5eaf792 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/init/automount
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/init/automount
diff --git a/arch/arm/boards/efika-mx-smartbook/env/init/bootsource b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/init/bootsource
index 380e85589b..380e85589b 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/init/bootsource
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/init/bootsource
diff --git a/arch/arm/boards/efika-mx-smartbook/env/network/eth0-discover b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/network/eth0-discover
index f8368a5ec6..f8368a5ec6 100644
--- a/arch/arm/boards/efika-mx-smartbook/env/network/eth0-discover
+++ b/arch/arm/boards/efika-mx-smartbook/defaultenv-efikasb/network/eth0-discover
diff --git a/arch/arm/boards/efika-mx-smartbook/lowlevel.c b/arch/arm/boards/efika-mx-smartbook/lowlevel.c
index 0d32eee860..52454c7d50 100644
--- a/arch/arm/boards/efika-mx-smartbook/lowlevel.c
+++ b/arch/arm/boards/efika-mx-smartbook/lowlevel.c
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 #include <mach/imx5.h>
@@ -10,7 +11,7 @@ ENTRY_FUNCTION(start_imx51_genesi_efikasb, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 	arm_setup_stack(0x20000000 - 16);
 	imx51_init_lowlevel(800);
 
diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c b/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
index c3f7b4acbb..7a85b489d2 100644
--- a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
+++ b/arch/arm/boards/eukrea_cpuimx51/lowlevel.c
@@ -1,9 +1,10 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 	imx51_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
index 5a5a83c436..1b9ba16ef6 100644
--- a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
+++ b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 
@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx51_babbage, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	fdt = __dtb_imx51_babbage_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
index 7d1c1d5b2a..aff6e3bc54 100644
--- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 #include <image-metadata.h>
@@ -10,7 +11,7 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	fdt = __dtb_imx53_qsb_start - get_runtime_offset();
 
@@ -23,7 +24,7 @@ ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	fdt = __dtb_imx53_qsrb_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx53-smd/lowlevel.c b/arch/arm/boards/freescale-mx53-smd/lowlevel.c
index 1db07e2e2c..306db09acf 100644
--- a/arch/arm/boards/freescale-mx53-smd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-smd/lowlevel.c
@@ -1,9 +1,10 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 	imx53_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
index 4054fd51e2..487a9fd899 100644
--- a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
+++ b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 
@@ -9,7 +10,7 @@ ENTRY_FUNCTION(start_imx53_vmx53, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	fdt = __dtb_imx53_voipac_bsb_start - get_runtime_offset();
 
diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile b/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile
new file mode 100644
index 0000000000..cc4078f7b4
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o flash-header-mx6sx-sabresdb.dcd.o
+extra-y += flash-header-mx6sx-sabresdb.dcd.S flash-header-mx6sx-sabresdb.dcd
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c
new file mode 100644
index 0000000000..c21b43dc56
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c
@@ -0,0 +1,249 @@
+/*
+ * Copyright (C) 2014 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#define pr_fmt(fmt) "imx6sx-sdb: " fmt
+
+#include <environment.h>
+#include <partition.h>
+#include <common.h>
+#include <sizes.h>
+#include <gpio.h>
+#include <init.h>
+#include <io.h>
+#include <mfd/imx6q-iomuxc-gpr.h>
+#include <generated/mach-types.h>
+#include <linux/clk.h>
+#include <i2c/i2c.h>
+
+#include <asm/armlinux.h>
+
+#include <mach/devices-imx6.h>
+#include <mach/imx6-regs.h>
+#include <mach/iomux-mx6.h>
+#include <mach/generic.h>
+#include <mach/imx6.h>
+#include <mach/bbu.h>
+
+#define PFUZE100_DEVICEID	0x0
+#define PFUZE100_REVID		0x3
+#define PFUZE100_FABID		0x4
+
+#define PFUZE100_SW1ABVOL	0x20
+#define PFUZE100_SW1ABSTBY	0x21
+#define PFUZE100_SW1ABCONF	0x24
+#define PFUZE100_SW1CVOL	0x2e
+#define PFUZE100_SW1CSTBY	0x2f
+#define PFUZE100_SW1CCONF	0x32
+#define PFUZE100_SW1ABC_SETP(x)	((x - 3000) / 250)
+#define PFUZE100_VGEN5CTL	0x70
+
+/* set all switches APS in normal and PFM mode in standby */
+static int imx6sx_sdb_setup_pmic_mode(struct i2c_client *client, int chip)
+{
+	unsigned char offset, i, switch_num, value;
+
+	if (!chip) {
+		/* pfuze100 */
+		switch_num = 6;
+		offset = 0x31;
+	} else {
+		/* pfuze200 */
+		switch_num = 4;
+		offset = 0x38;
+	}
+
+	value = 0xc;
+	if (i2c_write_reg(client, 0x23, &value, 1) < 0)
+		return -EIO;
+
+	for (i = 0; i < switch_num - 1; i++)
+		if (i2c_write_reg(client, offset + i * 7, &value, 1) < 0)
+			return -EIO;
+
+	return 0;
+}
+
+static int imx6sx_sdb_setup_pmic_voltages(void)
+{
+	unsigned char value, rev_id = 0;
+	struct i2c_adapter *adapter = NULL;
+	struct i2c_client client;
+	int addr = -1, bus = 0;
+
+	if (!of_machine_is_compatible("fsl,imx6sx-sdb"))
+		return 0;
+
+	/* I2C2 bus (2-1 = 1 in barebox numbering) */
+	bus = 0;
+
+	/* PFUZE100 device address is 0x08 */
+	addr = 0x08;
+
+	adapter = i2c_get_adapter(bus);
+	if (!adapter)
+		return -ENODEV;
+
+	client.adapter = adapter;
+	client.addr = addr;
+
+	if (i2c_read_reg(&client, PFUZE100_DEVICEID, &value, 1) < 0)
+		goto err_out;
+	if (i2c_read_reg(&client, PFUZE100_REVID, &rev_id, 1) < 0)
+		goto err_out;
+
+	pr_info("Found PFUZE100! deviceid 0x%x, revid 0x%x\n", value, rev_id);
+
+	if (imx6sx_sdb_setup_pmic_mode(&client, value & 0xf))
+		goto err_out;
+
+	/* set SW1AB standby volatage 0.975V */
+	if (i2c_read_reg(&client, PFUZE100_SW1ABSTBY, &value, 1) < 0)
+		goto err_out;
+
+	value &= ~0x3f;
+	value |= PFUZE100_SW1ABC_SETP(9750);
+	if (i2c_write_reg(&client, PFUZE100_SW1ABSTBY, &value, 1) < 0)
+		goto err_out;
+
+	/* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+	if (i2c_read_reg(&client, PFUZE100_SW1ABCONF, &value, 1) < 0)
+		goto err_out;
+
+	value &= ~0xc0;
+	value |= 0x40;
+	if (i2c_write_reg(&client, PFUZE100_SW1ABCONF, &value, 1) < 0)
+		goto err_out;
+
+
+	/* set SW1C standby volatage 0.975V */
+	if (i2c_read_reg(&client, PFUZE100_SW1CSTBY, &value, 1) < 0)
+		goto err_out;
+
+	value &= ~0x3f;
+	value |= PFUZE100_SW1ABC_SETP(9750);
+	if (i2c_write_reg(&client, PFUZE100_SW1CSTBY, &value, 1) < 0)
+		goto err_out;
+
+
+	/* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
+	if (i2c_read_reg(&client, PFUZE100_SW1CCONF, &value, 1) < 0)
+		goto err_out;
+
+	value &= ~0xc0;
+	value |= 0x40;
+	if (i2c_write_reg(&client, PFUZE100_SW1CCONF, &value, 1) < 0)
+		goto err_out;
+
+	/* Enable power of VGEN5 3V3, needed for SD3 */
+	if (i2c_read_reg(&client, PFUZE100_VGEN5CTL, &value, 1) < 0)
+		goto err_out;
+
+	value &= ~0x1F;
+	value |= 0x1F;
+	if (i2c_write_reg(&client, PFUZE100_VGEN5CTL, &value, 1) < 0)
+		goto err_out;
+
+	return 0;
+
+err_out:
+	pr_err("Setting up PMIC failed\n");
+
+	return -EIO;
+}
+fs_initcall(imx6sx_sdb_setup_pmic_voltages);
+
+int ar8031_phy_fixup(struct phy_device *phydev)
+{
+	/*
+	 * Enable 1.8V(SEL_1P5_1P8_POS_REG) on
+	 * Phy control debug reg 0
+	 */
+	phy_write(phydev, 0x1d, 0x1f);
+	phy_write(phydev, 0x1e, 0x8);
+
+	/* rgmii tx clock delay enable */
+	phy_write(phydev, 0x1d, 0x05);
+	phy_write(phydev, 0x1e, 0x100);
+
+	return 0;
+}
+
+#define PHY_ID_AR8031	0x004dd074
+#define AR_PHY_ID_MASK	0xffffffff
+
+static int imx6sx_sdb_setup_fec(void)
+{
+	void __iomem *gprbase = (void *)MX6_IOMUXC_BASE_ADDR + 0x4000;
+	uint32_t val;
+	struct clk *clk;
+
+	phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
+			ar8031_phy_fixup);
+
+	/* Active high for ncp692 */
+	gpio_direction_output(IMX_GPIO_NR(4, 16), 1);
+
+	clk = clk_lookup("enet_ptp_25m");
+	if (IS_ERR(clk))
+		goto err;
+
+	clk_enable(clk);
+
+	clk = clk_lookup("enet_ref");
+	if (IS_ERR(clk))
+		goto err;
+	clk_enable(clk);
+
+	clk = clk_lookup("enet2_ref_125m");
+	if (IS_ERR(clk))
+		goto err;
+
+	clk_enable(clk);
+
+	val = readl(gprbase + IOMUXC_GPR1);
+	/* Use 125M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/
+	val &= ~(1 << 13);
+	val &= ~(1 << 17);
+	/* Use 125M anatop loopback REF_CLK1 for ENET2, clear gpr1[14], gpr1[18]*/
+	val &= ~(1 << 14);
+	val &= ~(1 << 18);
+	writel(val, gprbase + IOMUXC_GPR1);
+
+	/* Enable the ENET power, active low */
+	gpio_direction_output(IMX_GPIO_NR(2, 6), 0);
+
+	/* Reset AR8031 PHY */
+	gpio_direction_output(IMX_GPIO_NR(2, 7), 0);
+	udelay(500);
+	gpio_set_value(IMX_GPIO_NR(2, 7), 1);
+
+	return 0;
+err:
+	pr_err("Setting up DFEC\n");
+
+	return -EIO;
+}
+
+static int imx6sx_sdb_coredevices_init(void)
+{
+	if (!of_machine_is_compatible("fsl,imx6sx-sdb"))
+		return 0;
+
+	imx6sx_sdb_setup_fec();
+
+	imx6_bbu_internal_mmc_register_handler("sd", "/dev/mmc3",
+			BBU_HANDLER_FLAG_DEFAULT);
+
+	return 0;
+}
+console_initcall(imx6sx_sdb_coredevices_init);
diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/flash-header-mx6sx-sabresdb.imxcfg b/arch/arm/boards/freescale-mx6sx-sabresdb/flash-header-mx6sx-sabresdb.imxcfg
new file mode 100644
index 0000000000..a96b3e7154
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6sx-sabresdb/flash-header-mx6sx-sabresdb.imxcfg
@@ -0,0 +1,75 @@
+loadaddr 0x80000000
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020c4068 0xffffffff
+wm 32 0x020c406c 0xffffffff
+wm 32 0x020c4070 0xffffffff
+wm 32 0x020c4074 0xffffffff
+wm 32 0x020c4078 0xffffffff
+wm 32 0x020c407c 0xffffffff
+wm 32 0x020c4080 0xffffffff
+wm 32 0x020c4084 0xffffffff
+
+wm 32 0x020e0618 0x000c0000
+wm 32 0x020e05fc 0x00000000
+wm 32 0x020e032c 0x00000030
+
+wm 32 0x020e0300 0x00000030
+wm 32 0x020e02fc 0x00000030
+wm 32 0x020e05f4 0x00000030
+wm 32 0x020e0340 0x00000030
+
+wm 32 0x020e0320 0x00000000
+wm 32 0x020e0310 0x00000030
+wm 32 0x020e0314 0x00000030
+wm 32 0x020e0614 0x00000030
+wm 32 0x020e05f8 0x00020000
+wm 32 0x020e0330 0x00000030
+wm 32 0x020e0334 0x00000030
+wm 32 0x020e0338 0x00000030
+wm 32 0x020e033c 0x00000030
+wm 32 0x020e0608 0x00020000
+wm 32 0x020e060c 0x00000030
+wm 32 0x020e0610 0x00000030
+wm 32 0x020e061c 0x00000030
+wm 32 0x020e0620 0x00000030
+wm 32 0x020e02ec 0x00000030
+wm 32 0x020e02f0 0x00000030
+wm 32 0x020e02f4 0x00000030
+wm 32 0x020e02f8 0x00000030
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b080c 0x00270025
+wm 32 0x021b0810 0x001b001e
+wm 32 0x021b083c 0x4144013c
+wm 32 0x021b0840 0x01300128
+wm 32 0x021b0848 0x4044464a
+wm 32 0x021b0850 0x3a383c34
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b0004 0x0002002d
+wm 32 0x021b0008 0x00333030
+wm 32 0x021b000c 0x676b52f3
+wm 32 0x021b0010 0xb66d8b63
+wm 32 0x021b0014 0x01ff00db
+wm 32 0x021b0018 0x00011740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x006b1023
+wm 32 0x021b0040 0x0000005f
+wm 32 0x021b0000 0x84190000
+wm 32 0x021b001c 0x04008032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00068031
+wm 32 0x021b001c 0x05208030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00000800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b001c 0x00000000
+wm 32 0x021b083c 0x41400138
+wm 32 0x021b0840 0x012c011c
+wm 32 0x021b0848 0x3c3c4044
+wm 32 0x021b0850 0x34343638
diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c
new file mode 100644
index 0000000000..33f3700288
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2014 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <debug_ll.h>
+#include <common.h>
+#include <sizes.h>
+#include <mach/generic.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+static inline void setup_uart(void)
+{
+	void __iomem *ccmbase = (void *)MX6_CCM_BASE_ADDR;
+	void __iomem *uartbase = (void *)MX6_UART1_BASE_ADDR;
+	void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
+
+	writel(0xffffffff, ccmbase + 0x68);
+	writel(0xffffffff, ccmbase + 0x6c);
+	writel(0xffffffff, ccmbase + 0x70);
+	writel(0xffffffff, ccmbase + 0x74);
+	writel(0xffffffff, ccmbase + 0x78);
+	writel(0xffffffff, ccmbase + 0x7c);
+	writel(0xffffffff, ccmbase + 0x80);
+
+	writel(0x0, iomuxbase + 0x24);
+	writel(0x1b0b1, iomuxbase + 0x036C);
+	writel(0x0, iomuxbase + 0x28);
+	writel(0x1b0b1, iomuxbase + 0x0370);
+
+	writel(0x00000000, uartbase + 0x80);
+	writel(0x00004027, uartbase + 0x84);
+	writel(0x00000784, uartbase + 0x88);
+	writel(0x00000a81, uartbase + 0x90);
+	writel(0x0000002b, uartbase + 0x9c);
+	writel(0x0001b0b0, uartbase + 0xb0);
+	writel(0x0000047f, uartbase + 0xa4);
+	writel(0x0000c34f, uartbase + 0xa8);
+	writel(0x00000001, uartbase + 0x80);
+
+	putc_ll('>');
+}
+
+extern char __dtb_imx6sx_sdb_start[];
+
+ENTRY_FUNCTION(start_imx6sx_sabresdb, r0, r1, r2)
+{
+	void *fdt;
+
+	imx6_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_imx6sx_sdb_start - get_runtime_offset();
+
+	barebox_arm_entry(0x80000000, SZ_1G, fdt);
+}
diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
index 186c0d9dd0..00e34fba39 100644
--- a/arch/arm/boards/guf-vincell/lowlevel.c
+++ b/arch/arm/boards/guf-vincell/lowlevel.c
@@ -6,6 +6,7 @@
 #include <mach/iomux-v3.h>
 #include <mach/esdctl-v4.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm.h>
 #include <asm/barebox-arm-head.h>
 #include <io.h>
@@ -127,7 +128,7 @@ void __bare_init __naked barebox_arm_reset_vector(void)
 {
 	u32 r;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	/* Skip SDRAM initialization if we run from RAM */
 	r = get_pc();
diff --git a/arch/arm/boards/karo-tx51/lowlevel.c b/arch/arm/boards/karo-tx51/lowlevel.c
index c3f7b4acbb..7a85b489d2 100644
--- a/arch/arm/boards/karo-tx51/lowlevel.c
+++ b/arch/arm/boards/karo-tx51/lowlevel.c
@@ -1,9 +1,10 @@
 #include <common.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 	imx51_barebox_entry(NULL);
 }
diff --git a/arch/arm/boards/karo-tx53/lowlevel.c b/arch/arm/boards/karo-tx53/lowlevel.c
index d82e6669b0..8adbd8d666 100644
--- a/arch/arm/boards/karo-tx53/lowlevel.c
+++ b/arch/arm/boards/karo-tx53/lowlevel.c
@@ -3,10 +3,11 @@
 #include <asm/barebox-arm.h>
 #include <mach/imx5.h>
 #include <mach/esdctl.h>
+#include <mach/generic.h>
 
 void __naked barebox_arm_reset_vector(void)
 {
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	/*
 	 * For the TX53 rev 8030 the SDRAM setup is not stable without
diff --git a/arch/arm/boards/phytec-phyflex-imx6/board.c b/arch/arm/boards/phytec-phyflex-imx6/board.c
index 09a5c79a9a..1551460393 100644
--- a/arch/arm/boards/phytec-phyflex-imx6/board.c
+++ b/arch/arm/boards/phytec-phyflex-imx6/board.c
@@ -63,13 +63,6 @@ static void phyflex_err006282_workaround(void)
 	gpio_direction_input(MX6_PHYFLEX_ERR006282);
 }
 
-static int ksz9031rn_phy_fixup(struct phy_device *dev)
-{
-	phy_write_mmd_indirect(dev, 8, 2, 0x039F);
-
-	return 0;
-}
-
 static int phytec_pfla02_init(void)
 {
 	if (!of_machine_is_compatible("phytec,imx6q-pfla02") &&
@@ -79,9 +72,6 @@ static int phytec_pfla02_init(void)
 
 	phyflex_err006282_workaround();
 
-	phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
-					   ksz9031rn_phy_fixup);
-
 	imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT);
 
 	switch (bootsource_get()) {
diff --git a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
index 84014d772a..ce168b2cca 100644
--- a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
@@ -54,16 +54,16 @@ static inline void setup_uart(void)
 	putc_ll('>');
 }
 
-extern char __dtb_imx6q_phytec_pbab01_start[];
-extern char __dtb_imx6dl_phytec_pbab01_start[];
-extern char __dtb_imx6s_phytec_pbab01_start[];
+#define SZ_4G 0xEFFFFFF8
 
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_512M, IMD_TYPE_PARAMETER, "memsize=512", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
-BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
+BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
 
-static void __noreturn start_imx6q_phytec_pbab01_common(uint32_t size)
+static void __noreturn start_imx6_phytec_common(uint32_t size,
+						bool do_early_uart_config,
+						void *fdt_blob_fixed_offset)
 {
 	void *fdt;
 
@@ -71,67 +71,28 @@ static void __noreturn start_imx6q_phytec_pbab01_common(uint32_t size)
 
 	arm_setup_stack(0x00920000 - 8);
 
-	if (IS_ENABLED(CONFIG_DEBUG_LL))
+	if (do_early_uart_config && IS_ENABLED(CONFIG_DEBUG_LL))
 		setup_uart();
 
-	fdt = __dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
-
-	barebox_arm_entry(0x10000000, size, fdt);
-}
-
-
-static void __noreturn start_imx6dl_phytec_pbab01_common(uint32_t size)
-{
-	void *fdt;
-
-	imx6_cpu_lowlevel_init();
-
-	arm_setup_stack(0x00920000 - 8);
-
-	fdt = __dtb_imx6dl_phytec_pbab01_start - get_runtime_offset();
-
+	fdt = fdt_blob_fixed_offset - get_runtime_offset();
 	barebox_arm_entry(0x10000000, size, fdt);
 }
 
-ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
-{
-	IMD_USED(phyflex_mx6_memsize_1G);
-
-	start_imx6q_phytec_pbab01_common(SZ_1G);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
-{
-	IMD_USED(phyflex_mx6_memsize_2G);
-
-	start_imx6q_phytec_pbab01_common(SZ_2G);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01_4gib, r0, r1, r2)
-{
-	IMD_USED(phyflex_mx6_memsize_4G);
-
-	start_imx6q_phytec_pbab01_common(0xEFFFFFF8);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01dl_1gib, r0, r1, r2)
-{
-	IMD_USED(phyflex_mx6_memsize_1G);
-
-	start_imx6dl_phytec_pbab01_common(SZ_1G);
-}
-
-ENTRY_FUNCTION(start_phytec_pbab01s_512mb, r0, r1, r2)
-{
-	void *fdt;
-
-	imx6_cpu_lowlevel_init();
-
-	arm_setup_stack(0x00920000 - 8);
-
-	IMD_USED(phyflex_mx6_memsize_512M);
-
-	fdt = __dtb_imx6s_phytec_pbab01_start - get_runtime_offset();
-
-	barebox_arm_entry(0x10000000, SZ_512M, fdt);
-}
+#define PHYTEC_ENTRY(name, fdt_name, memory_size, do_early_uart_config)	\
+	ENTRY_FUNCTION(name, r0, r1, r2)				\
+	{								\
+		extern char __dtb_##fdt_name##_start[];			\
+									\
+		IMD_USED(phyflex_mx6_memsize_##memory_size);		\
+									\
+		start_imx6_phytec_common(memory_size, do_early_uart_config, \
+					 __dtb_##fdt_name##_start);	\
+	}
+
+PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_pbab01_2gib, imx6q_phytec_pbab01, SZ_2G, true);
+PHYTEC_ENTRY(start_phytec_pbab01_4gib, imx6q_phytec_pbab01, SZ_4G, true);
+PHYTEC_ENTRY(start_phytec_pbab01dl_1gib, imx6dl_phytec_pbab01, SZ_1G, false);
+PHYTEC_ENTRY(start_phytec_pbab01s_512mb, imx6s_phytec_pbab01, SZ_512M, false);
+PHYTEC_ENTRY(start_phytec_phyboard_alcor_1gib, imx6q_phytec_phyboard_alcor, SZ_1G, false);
+PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb, imx6dl_phytec_phyboard_subra, SZ_512M, false);
diff --git a/arch/arm/boards/tqma53/lowlevel.c b/arch/arm/boards/tqma53/lowlevel.c
index cd87212555..4e129e49f6 100644
--- a/arch/arm/boards/tqma53/lowlevel.c
+++ b/arch/arm/boards/tqma53/lowlevel.c
@@ -5,6 +5,7 @@
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
 #include <mach/imx5.h>
+#include <mach/generic.h>
 #include <image-metadata.h>
 
 extern char __dtb_imx53_mba53_start[];
@@ -41,7 +42,7 @@ ENTRY_FUNCTION(start_imx53_mba53_512mib, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	arm_setup_stack(0xf8020000 - 8);
 
@@ -60,7 +61,7 @@ ENTRY_FUNCTION(start_imx53_mba53_1gib, r0, r1, r2)
 {
 	void *fdt;
 
-	arm_cpu_lowlevel_init();
+	imx5_cpu_lowlevel_init();
 
 	arm_setup_stack(0xf8020000 - 8);