boards: Add phytec-phyflex-am335x

Add support for PHYTEC's phyFLEX-AM335x.

Signed-off-by: Stefan Müller-Klieser <s.mueller-klieser@phytec.de>
[clean ups]
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

8 files changed, 325 insertions, 0 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index c80b9c920a..25045ac6ad 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -79,6 +79,7 @@ obj-$(CONFIG_MACH_PCM038)			+= phytec-phycore-imx27/
 obj-$(CONFIG_MACH_PCM043)			+= phytec-phycore-imx35/
 obj-$(CONFIG_MACH_PCM049)			+= phytec-phycore-omap4460/
 obj-$(CONFIG_MACH_PCM051)			+= phytec-phycore-am335x/
+obj-$(CONFIG_MACH_PFLA03)			+= phytec-phyflex-am335x/
 obj-$(CONFIG_MACH_PHYTEC_PFLA02)		+= phytec-phyflex-imx6/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3)	+= plathome-openblocks-ax3/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6)	+= plathome-openblocks-a6/
diff --git a/arch/arm/boards/phytec-phyflex-am335x/Makefile b/arch/arm/boards/phytec-phyflex-am335x/Makefile
new file mode 100644
index 0000000000..54734b5736
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/Makefile
@@ -0,0 +1,3 @@
+lwl-y += lowlevel.o
+obj-y += board.o
+bbenv-y += defaultenv-phyflex-am335x
diff --git a/arch/arm/boards/phytec-phyflex-am335x/board.c b/arch/arm/boards/phytec-phyflex-am335x/board.c
new file mode 100644
index 0000000000..12fad8f998
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/board.c
@@ -0,0 +1,100 @@
+/*
+ * pfla03 - phyFLEX-AM335x Board Initalization Code
+ *
+ * Copyright (C) 2014 Stefan Müller-Klieser, Phytec Messtechnik GmbH
+ *
+ * Based on arch/arm/boards/omap/board-beagle.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <bootsource.h>
+#include <common.h>
+#include <nand.h>
+#include <init.h>
+#include <io.h>
+#include <sizes.h>
+#include <envfs.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <linux/phy.h>
+#include <linux/micrel_phy.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/bbu.h>
+
+static int ksz9031rn_phy_fixup(struct phy_device *dev)
+{
+	phy_write_mmd_indirect(dev, 6, 2, 0);
+	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+
+	return 0;
+}
+
+static int pfla03_coredevice_init(void)
+{
+	if (!of_machine_is_compatible("phytec,phyflex-am335x-som"))
+		return 0;
+
+	phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
+					ksz9031rn_phy_fixup);
+	am33xx_register_ethaddr(0, 0);
+	am33xx_register_ethaddr(1, 1);
+
+	return 0;
+}
+coredevice_initcall(pfla03_coredevice_init);
+
+static struct omap_barebox_part pfla03_barebox_part = {
+	.nand_offset = SZ_512K,
+	.nand_size = SZ_512K,
+	.nor_offset = SZ_128K,
+	.nor_size = SZ_512K,
+};
+
+static char *xloadslots[] = {
+	"/dev/nand0.xload.bb",
+	"/dev/nand0.xload_backup1.bb",
+	"/dev/nand0.xload_backup2.bb",
+	"/dev/nand0.xload_backup3.bb"
+};
+
+static int pfla03_devices_init(void)
+{
+	if (!of_machine_is_compatible("phytec,phyflex-am335x-som"))
+		return 0;
+
+	switch (bootsource_get()) {
+	case BOOTSOURCE_SPI:
+		of_device_enable_path("/chosen/environment-spi");
+		break;
+	case BOOTSOURCE_MMC:
+		omap_set_bootmmc_devname("mmc0");
+		break;
+	default:
+		of_device_enable_path("/chosen/environment-nand");
+		break;
+	}
+
+	omap_set_barebox_part(&pfla03_barebox_part);
+	armlinux_set_architecture(MACH_TYPE_PFLA03);
+	defaultenv_append_directory(defaultenv_phyflex_am335x);
+
+	am33xx_bbu_spi_nor_mlo_register_handler("MLO.spi", "/dev/m25p0.xload");
+	am33xx_bbu_spi_nor_register_handler("spi", "/dev/m25p0.barebox");
+	am33xx_bbu_nand_xloadslots_register_handler("MLO.nand",
+		xloadslots, ARRAY_SIZE(xloadslots));
+	am33xx_bbu_nand_register_handler("nand", "/dev/nand0.barebox.bb");
+
+	return 0;
+}
+device_initcall(pfla03_devices_init);
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc
new file mode 100644
index 0000000000..6a6076101e
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/mmc
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+global.bootm.image=/boot/linuximage
+#global.bootm.oftree=/boot/oftree
+
+bootargs-ip
+
+global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rw rootwait"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand
new file mode 100644
index 0000000000..d9ef1455ee
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/nand
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+global.bootm.image="/dev/nand0.kernel.bb"
+#global.bootm.oftree="/env/oftree"
+
+bootargs-ip
+
+global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root,2048 rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi
new file mode 100644
index 0000000000..c87299a9ea
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/boot/spi
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+global.bootm.image="/dev/m25p0.kernel"
+
+bootargs-ip
+
+# Use rootfs form NAND for now as rootfs partition < 4MB
+global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root,2048 rw rootfstype=ubifs"
diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/config-board b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/config-board
new file mode 100644
index 0000000000..b620ac1aba
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/config-board
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+# board defaults, do not change in running system. Change /env/config
+# instead
+
+global.hostname=pfla03
+global.linux.bootargs.base="console=ttyO0,115200"
+
+if [ $bootsource = mmc ]; then
+	global.boot.default="mmc nand spi net"
+elif [ $boosource = nand ]; then
+	global.boot.default="nand spi mmc net"
+elif [ $boosource = spi ]; then
+	global.boot.default="spi nand mmc net"
+elif [ $boosource = net ]; then
+	global.boot.default="net nand spi mmc"
+fi
diff --git a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
new file mode 100644
index 0000000000..4d34968a0b
--- /dev/null
+++ b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c
@@ -0,0 +1,180 @@
+/*
+ * pfla03 - phyFLEX-AM335x lowlevel code
+ *
+ * Copyright (C) 2014 Stefan Müller-Klieser, Phytec Messtechnik GmbH
+ *
+ * Based on arch/arm/boards/omap/board-beagle.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <sizes.h>
+#include <io.h>
+#include <init.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/am33xx-clock.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/am33xx-mux.h>
+#include <mach/am33xx-generic.h>
+#include <mach/wdt.h>
+#include <debug_ll.h>
+
+#define CLK_M_OSC_MHZ	25
+#define DDR_IOCTRL	0x18B
+
+static const struct am33xx_cmd_control pfla03_cmd = {
+	.slave_ratio0	= 0x80,
+	.dll_lock_diff0	= 0x0,
+	.invert_clkout0	= 0x0,
+	.slave_ratio1	= 0x80,
+	.dll_lock_diff1	= 0x0,
+	.invert_clkout1	= 0x0,
+	.slave_ratio2	= 0x80,
+	.dll_lock_diff2	= 0x0,
+	.invert_clkout2	= 0x0,
+};
+
+struct pfla03_sdram_timings {
+	struct am33xx_emif_regs regs;
+	struct am33xx_ddr_data data;
+};
+
+enum {
+	MT41K128M16JT_256MB,
+	MT41K256M16HA_512MB,
+};
+
+struct pfla03_sdram_timings pfla03_timings[] = {
+	/* 256 MB */
+	[MT41K128M16JT_256MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAD4DB,
+			.emif_tim2		= 0x26437FDA,
+			.emif_tim3		= 0x501F83FF,
+			.sdram_config		= 0x61C052B2,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x34,
+			.wr_dqs_slave_ratio0	= 0x47,
+			.fifo_we_slave_ratio0	= 0x9a,
+			.wr_slave_ratio0	= 0x7e,
+			.use_rank0_delay	= 0x0,
+			.dll_lock_diff0		= 0x0,
+		},
+	},
+	/* 512 MB */
+	[MT41K256M16HA_512MB] = {
+		.regs = {
+			.emif_read_latency	= 0x7,
+			.emif_tim1		= 0x0AAAE4DB,
+			.emif_tim2		= 0x266B7FDA,
+			.emif_tim3		= 0x501F867F,
+			.sdram_config		= 0x61C05332,
+			.zq_config		= 0x50074BE4,
+			.sdram_ref_ctrl		= 0x00000C30,
+		},
+		.data = {
+			.rd_slave_ratio0	= 0x36,
+			.wr_dqs_slave_ratio0	= 0x47,
+			.fifo_we_slave_ratio0	= 0x95,
+			.wr_slave_ratio0	= 0x7f,
+			.use_rank0_delay	= 0x0,
+			.dll_lock_diff0		= 0x0,
+		},
+	},
+};
+
+extern char __dtb_am335x_phytec_phyflex_start[];
+
+/**
+ * @brief The basic entry point for board initialization.
+ *
+ * This is called as part of machine init (after arch init).
+ * This is again called with stack in SRAM, so not too many
+ * constructs possible here.
+ *
+ * @return void
+ */
+static noinline void pfla03_board_init(int sdram)
+{
+	void *fdt;
+	struct pfla03_sdram_timings *timing = &pfla03_timings[sdram];
+
+	/*
+	 * WDT1 is already running when the bootloader gets control
+	 * Disable it to avoid "random" resets
+	 */
+	writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+	writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+	while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+	am33xx_pll_init(MPUPLL_M_600, CLK_M_OSC_MHZ, DDRPLL_M_400);
+
+	am335x_sdram_init(DDR_IOCTRL, &pfla03_cmd,
+			&timing->regs,
+			&timing->data);
+
+	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
+	am33xx_enable_uart0_pin_mux();
+	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+	putc_ll('>');
+
+	fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
+
+	am335x_barebox_entry(fdt);
+}
+
+static noinline void pfla03_board_entry(unsigned long bootinfo, int sdram)
+{
+	am33xx_save_bootinfo((void *)bootinfo);
+
+	arm_cpu_lowlevel_init();
+
+	/*
+	 * Setup C environment, the board init code uses global variables.
+	 * Stackpointer has already been initialized by the ROM code.
+	 */
+	relocate_to_current_adr();
+	setup_c();
+
+	pfla03_board_init(sdram);
+}
+
+ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sram_256mb, bootinfo, r1, r2)
+{
+	pfla03_board_entry(bootinfo, MT41K128M16JT_256MB);
+}
+
+ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sram_512mb, bootinfo, r1, r2)
+{
+	pfla03_board_entry(bootinfo, MT41K256M16HA_512MB);
+}
+
+ENTRY_FUNCTION(start_am33xx_phytec_phyflex_sdram, r0, r1, r2)
+{
+	void *fdt;
+
+	fdt = __dtb_am335x_phytec_phyflex_start - get_runtime_offset();
+
+	am335x_barebox_entry(fdt);
+}