Merge branch 'for-next/omap'

10 files changed, 77 insertions, 15 deletions

diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c
index 04a6611314..76c9be4fac 100644
--- a/arch/arm/boards/beagle/board.c
+++ b/arch/arm/boards/beagle/board.c
@@ -283,6 +283,12 @@ static struct i2c_board_info i2c_devices[] = {
 	},
 };
 
+static struct gpmc_nand_platform_data nand_plat = {
+	.device_width = 16,
+	.ecc_mode = OMAP_ECC_HAMMING_CODE_HW_ROMCODE,
+	.nand_cfg = &omap3_nand_cfg,
+};
+
 static int beagle_mem_init(void)
 {
 	arm_add_mem_device("ram0", 0x80000000, 128 * 1024 * 1024);
@@ -306,8 +312,7 @@ static int beagle_devices_init(void)
 	/* WP is made high and WAIT1 active Low */
 	gpmc_generic_init(0x10);
 #endif
-	gpmc_generic_nand_devices_init(0, 16,
-			OMAP_ECC_HAMMING_CODE_HW_ROMCODE, &omap3_nand_cfg);
+	omap_add_gpmc_nand_device(&nand_plat);
 
 	add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
 			   IORESOURCE_MEM, NULL);
diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff053..0b4b199d34 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
 #include <mach/syslib.h>
 #include <asm/barebox-arm.h>
 
+#define TPS62361_VSEL0_GPIO    7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
 	omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
 
 	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-	omap4_scale_vcores();
+	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
 	board_init_lowlevel_return();
 }
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e43372f..3783006ad6 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 */ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_wk7 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio1_wup_clocks();
+	}
 }
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 5b7854a5e3..3ef38a7831 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -94,6 +94,12 @@ static struct i2c_board_info i2c_devices[] = {
 	},
 };
 
+static struct gpmc_nand_platform_data nand_plat = {
+	.wait_mon_pin = 1,
+	.ecc_mode = OMAP_ECC_BCH8_CODE_HW,
+	.nand_cfg = &omap4_nand_cfg,
+};
+
 static int pcm049_devices_init(void)
 {
 	i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
@@ -107,8 +113,7 @@ static int pcm049_devices_init(void)
 
 	pcm049_network_init();
 
-	gpmc_generic_nand_devices_init(0, 8,
-			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
+	omap_add_gpmc_nand_device(&nand_plat);
 
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K, DEVFS_PARTITION_FIXED, "xload_raw");
diff --git a/arch/arm/boards/pcm049/lowlevel.c b/arch/arm/boards/pcm049/lowlevel.c
index 5b9109833b..65a29ec8ae 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
 #include <mach/syslib.h>
 #include <asm/barebox-arm.h>
 
+#define TPS62361_VSEL0_GPIO    182
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
 static void noinline pcm049_init_lowlevel(void)
 {
 	struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-	struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
 	struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
 	struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
 	struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static void noinline pcm049_init_lowlevel(void)
 	omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
 
 	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-	omap4_scale_vcores();
+	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
 	writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
 	/* Configure all DPLL's at 100% OPP */
-	omap4_configure_mpu_dpll(&mpu);
+	if (omap4_revision() < OMAP4460_ES1_0)
+		omap4_configure_mpu_dpll(&mpu44xx);
+	else
+		omap4_configure_mpu_dpll(&mpu4460);
+
 	omap4_configure_iva_dpll(&iva);
 	omap4_configure_per_dpll(&per);
 	omap4_configure_abe_dpll(&abe);
@@ -88,7 +95,7 @@ void board_init_lowlevel(void)
 		return;
 
 	r = 0x4030d000;
-        __asm__ __volatile__("mov sp, %0" : : "r"(r));
+	__asm__ __volatile__("mov sp, %0" : : "r"(r));
 
 	pcm049_init_lowlevel();
 }
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5adc..04e1d67214 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{GPMC_AD0, (IEN | PTD | DIS | M0)},				/* gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_182 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_CORE + FREF_CLK2_OUT);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio_clocks();
+	}
 }
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 00df240819..907198d783 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -391,9 +391,16 @@ struct omap_hsmmc_platform_data pcaal1_hsmmc_plat = {
 };
 #endif
 
+static struct gpmc_nand_platform_data nand_plat = {
+	.device_width = 16,
+	.ecc_mode = OMAP_ECC_BCH8_CODE_HW,
+	.nand_cfg = &omap3_nand_cfg,
+};
+
 static int pcaal1_init_devices(void)
 {
-	gpmc_generic_nand_devices_init(0, 16, OMAP_ECC_BCH8_CODE_HW, &omap3_nand_cfg);
+	omap_add_gpmc_nand_device(&nand_plat);
+
 #ifdef CONFIG_MCI_OMAP_HSMMC
 	add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
 			   IORESOURCE_MEM, &pcaal1_hsmmc_plat);
diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c b/arch/arm/boards/phycard-a-xl2/lowlevel.c
index b8de2aad0a..38f80c9733 100644
--- a/arch/arm/boards/phycard-a-xl2/lowlevel.c
+++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c
@@ -28,6 +28,8 @@
 #include <mach/syslib.h>
 #include <asm/barebox-arm.h>
 
+#define TPS62361_VSEL0_GPIO    7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
 static noinline void pcaaxl2_init_lowlevel(void)
 {
 	struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-	struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+	struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
 	struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
 	struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
 	struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static noinline void pcaaxl2_init_lowlevel(void)
 	omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
 
 	/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-	omap4_scale_vcores();
+	omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
 	writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
 	/* Configure all DPLL's at 100% OPP */
-	omap4_configure_mpu_dpll(&mpu);
+	if (omap4_revision() < OMAP4460_ES1_0)
+		omap4_configure_mpu_dpll(&mpu44xx);
+	else
+		omap4_configure_mpu_dpll(&mpu4460);
+
 	omap4_configure_iva_dpll(&iva);
 	omap4_configure_per_dpll(&per);
 	omap4_configure_abe_dpll(&abe);
diff --git a/arch/arm/boards/phycard-a-xl2/mux.c b/arch/arm/boards/phycard-a-xl2/mux.c
index 179e6b67ab..dc605e38b4 100644
--- a/arch/arm/boards/phycard-a-xl2/mux.c
+++ b/arch/arm/boards/phycard-a-xl2/mux.c
@@ -3,6 +3,7 @@
 #include <io.h>
 #include <mach/omap4-silicon.h>
 #include <mach/omap4-mux.h>
+#include <mach/omap4-clock.h>
 
 static const struct pad_conf_entry core_padconf_array[] = {
 	{GPMC_AD0, (IEN | PTD | DIS | M0)},				/* gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
 	omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
 			ARRAY_SIZE(wkup_padconf_array));
+
+	/* gpio_wk7 is used for controlling TPS on 4460 */
+	if (omap4_revision() >= OMAP4460_ES1_0) {
+		writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+		/* Enable GPIO-1 clocks before TPS initialization */
+		omap4_enable_gpio1_wup_clocks();
+	}
 }
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 2132dc3c12..4fec0f0e41 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -104,6 +104,12 @@ static struct omap_hsmmc_platform_data mmc_device = {
 #define OMAP4_MMC1_PBIASLITE_PWRDNZ		(1<<22)
 #define OMAP4_MMC1_PWRDNZ			(1<<26)
 
+static struct gpmc_nand_platform_data nand_plat = {
+	.device_width = 16,
+	.ecc_mode = OMAP_ECC_BCH8_CODE_HW,
+	.nand_cfg = &omap4_nand_cfg,
+};
+
 static int pcaaxl2_devices_init(void)
 {
 	u32 value;
@@ -124,8 +130,7 @@ static int pcaaxl2_devices_init(void)
 
 	pcaaxl2_network_init();
 
-	gpmc_generic_nand_devices_init(0, 16,
-			OMAP_ECC_BCH8_CODE_HW, &omap4_nand_cfg);
+	omap_add_gpmc_nand_device(&nand_plat);
 
 #ifdef CONFIG_PARTITION
 	devfs_add_partition("nand0", 0x00000, SZ_128K,