Merge branch 'for-next/arm'

5 files changed, 318 insertions, 8 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 23a8dbd7d0..da6ea0d1cc 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -137,4 +137,5 @@ obj-$(CONFIG_MACH_VIRT2REAL)			+= virt2real/
 obj-$(CONFIG_MACH_ZEDBOARD)			+= avnet-zedboard/
 obj-$(CONFIG_MACH_ZYLONITE)			+= zylonite/
 obj-$(CONFIG_MACH_VARISCITE_MX6)		+= variscite-mx6/
+obj-$(CONFIG_MACH_VSCOM_BALTOS)			+= vscom-baltos/
 obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
index abfb77a157..3b51e016e6 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
@@ -3,29 +3,70 @@
 #include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
+#include <mach/imx6-regs.h>
+#include <io.h>
+#include <mach/debug_ll.h>
+#include <mach/esdctl.h>
+#include <asm/cache.h>
 
 extern char __dtb_imx6q_sabrelite_start[];
 
-ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+static noinline void imx6q_sabrelite_start(void)
 {
-	void *fdt;
+	void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+	void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+	writel(0x4, iomuxbase + 0x0bc);
+
+	imx6_ungate_all_peripherals();
+	imx6_uart_setup(uart);
+	pbl_set_putc(imx_uart_putc, uart);
 
+	pr_debug("Freescale i.MX6q SabreLite\n");
+
+	imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+{
 	imx6_cpu_lowlevel_init();
 
-	fdt = __dtb_imx6q_sabrelite_start - get_runtime_offset();
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+	barrier();
 
-	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+	imx6q_sabrelite_start();
 }
 
 extern char __dtb_imx6dl_sabrelite_start[];
 
-ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+static noinline void imx6dl_sabrelite_start(void)
 {
-	void *fdt;
+	void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+	void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+	writel(0x4, iomuxbase + 0x16c);
+
+	imx6_ungate_all_peripherals();
+	imx6_uart_setup(uart);
+	pbl_set_putc(imx_uart_putc, uart);
 
+	pr_debug("Freescale i.MX6q SabreLite\n");
+
+	imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+{
 	imx6_cpu_lowlevel_init();
 
-	fdt = __dtb_imx6dl_sabrelite_start - get_runtime_offset();
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+	barrier();
 
-	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+	imx6dl_sabrelite_start();
 }
diff --git a/arch/arm/boards/vscom-baltos/Makefile b/arch/arm/boards/vscom-baltos/Makefile
new file mode 100644
index 0000000000..092c31d6b2
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/Makefile
@@ -0,0 +1,2 @@
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/vscom-baltos/board.c b/arch/arm/boards/vscom-baltos/board.c
new file mode 100644
index 0000000000..dc08ed5a20
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/board.c
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
+ * Raghavendra KH <r-khandenahally@ti.com>
+ *
+ * Copyright (C) 2012 Jan Luebbe <j.luebbe@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/**
+ * @file
+ * @brief OnRISC Baltos Specific Board Initialization routines
+ */
+
+#include <common.h>
+#include <init.h>
+#include <driver.h>
+#include <envfs.h>
+#include <environment.h>
+#include <globalvar.h>
+#include <linux/sizes.h>
+#include <net.h>
+#include <envfs.h>
+#include <bootsource.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/gpmc.h>
+#include <linux/err.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+
+static struct omap_barebox_part baltos_barebox_part = {
+	.nand_offset = SZ_512K,
+	.nand_size = 0x1e0000,
+};
+
+struct bsp_vs_hwparam {
+	uint32_t Magic;
+	uint32_t HwRev;
+	uint32_t SerialNumber;
+	char PrdDate[11];
+	uint16_t SystemId;
+	uint8_t MAC1[6];
+	uint8_t MAC2[6];
+	uint8_t MAC3[6];
+} __attribute__ ((packed));
+
+static int baltos_read_eeprom(void)
+{
+	struct bsp_vs_hwparam hw_param;
+	size_t size;
+	char *buf, var_buf[32];
+	int rc;
+	unsigned char mac_addr[6];
+
+	rc = read_file_2("/dev/eeprom0",
+			 &size,
+			 (void *)&buf,
+			 sizeof(hw_param));
+	if (rc && rc != -EFBIG)
+		return rc;
+
+	memcpy(&hw_param, buf, sizeof(hw_param));
+
+	free(buf);
+
+	if (hw_param.Magic == 0xDEADBEEF) {
+		/* setup MAC1 */
+		mac_addr[0] = hw_param.MAC1[0];
+		mac_addr[1] = hw_param.MAC1[1];
+		mac_addr[2] = hw_param.MAC1[2];
+		mac_addr[3] = hw_param.MAC1[3];
+		mac_addr[4] = hw_param.MAC1[4];
+		mac_addr[5] = hw_param.MAC1[5];
+
+		eth_register_ethaddr(0, mac_addr);
+
+		/* setup MAC2 */
+		mac_addr[0] = hw_param.MAC2[0];
+		mac_addr[1] = hw_param.MAC2[1];
+		mac_addr[2] = hw_param.MAC2[2];
+		mac_addr[3] = hw_param.MAC2[3];
+		mac_addr[4] = hw_param.MAC2[4];
+		mac_addr[5] = hw_param.MAC2[5];
+
+		eth_register_ethaddr(1, mac_addr);
+	} else {
+		printf("Baltos: incorrect magic number (0x%x) "
+		       "in EEPROM\n",
+		       hw_param.Magic);
+
+		hw_param.SystemId = 0;
+	}
+
+	sprintf(var_buf, "%d", hw_param.SystemId);
+	globalvar_add_simple("board.id", var_buf);
+
+	return 0;
+}
+environment_initcall(baltos_read_eeprom);
+
+static int baltos_devices_init(void)
+{
+	if (!of_machine_is_compatible("vscom,onrisc"))
+		return 0;
+
+	globalvar_add_simple("board.variant", "baltos");
+
+	if (bootsource_get() == BOOTSOURCE_MMC)
+		omap_set_bootmmc_devname("mmc0");
+
+	omap_set_barebox_part(&baltos_barebox_part);
+
+	if (IS_ENABLED(CONFIG_SHELL_NONE))
+		return am33xx_of_register_bootdevice();
+
+	return 0;
+}
+coredevice_initcall(baltos_devices_init);
diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
new file mode 100644
index 0000000000..8bce91a938
--- /dev/null
+++ b/arch/arm/boards/vscom-baltos/lowlevel.c
@@ -0,0 +1,134 @@
+#include <common.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <io.h>
+#include <linux/string.h>
+#include <debug_ll.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/am33xx-silicon.h>
+#include <mach/am33xx-clock.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/syslib.h>
+#include <mach/am33xx-mux.h>
+#include <mach/am33xx-generic.h>
+#include <mach/wdt.h>
+
+static const struct am33xx_ddr_data ddr3_data = {
+	.rd_slave_ratio0        = 0x38,
+	.wr_dqs_slave_ratio0    = 0x44,
+	.fifo_we_slave_ratio0	= 0x94,
+	.wr_slave_ratio0        = 0x7D,
+	.use_rank0_delay	= 0x01,
+	.dll_lock_diff0		= 0x0,
+};
+
+static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
+	.slave_ratio0	= 0x80,
+	.dll_lock_diff0	= 0x1,
+	.invert_clkout0	= 0x0,
+	.slave_ratio1	= 0x80,
+	.dll_lock_diff1	= 0x1,
+	.invert_clkout1	= 0x0,
+	.slave_ratio2	= 0x80,
+	.dll_lock_diff2	= 0x1,
+	.invert_clkout2	= 0x0,
+};
+
+static const struct am33xx_emif_regs ddr3_regs = {
+	.emif_read_latency	= 0x100007,
+	.emif_tim1		= 0x0AAAD4DB,
+	.emif_tim2		= 0x266B7FDA,
+	.emif_tim3		= 0x501F867F,
+	.zq_config		= 0x50074BE4,
+	.sdram_config		= 0x61C05332,
+	.sdram_config2		= 0x0,
+	.sdram_ref_ctrl		= 0xC30,
+};
+
+static const struct am33xx_ddr_data ddr3_data_256mb = {
+	.rd_slave_ratio0	= 0x36,
+	.wr_dqs_slave_ratio0	= 0x38,
+	.fifo_we_slave_ratio0	= 0x99,
+	.wr_slave_ratio0	= 0x73,
+};
+
+static const struct am33xx_emif_regs ddr3_regs_256mb = {
+	.emif_read_latency	= 0x7,
+	.emif_tim1		= 0x0AAAD4DB,
+	.emif_tim2		= 0x26437FDA,
+	.emif_tim3		= 0x501F83FF,
+	.sdram_config		= 0x61C052B2,
+	.zq_config		= 0x50074BE4,
+	.sdram_ref_ctrl		= 0x00000C30,
+
+};
+
+extern char __dtb_am335x_baltos_minimal_start[];
+
+/**
+ * @brief The basic entry point for board initialization.
+ *
+ * This is called as part of machine init (after arch init).
+ * This is again called with stack in SRAM, so not too many
+ * constructs possible here.
+ *
+ * @return void
+ */
+static noinline int baltos_sram_init(void)
+{
+	uint32_t sdram_size;
+	void *fdt;
+
+	fdt = __dtb_am335x_baltos_minimal_start;
+
+	/* WDT1 is already running when the bootloader gets control
+	 * Disable it to avoid "random" resets
+	 */
+	__raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+	__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+	while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+	/* Setup the PLLs and the clocks for the peripherals */
+	am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);
+	am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
+	sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
+	if (sdram_size == SZ_256M)
+		am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs_256mb,
+				&ddr3_data_256mb);
+
+	am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
+	am33xx_enable_uart0_pin_mux();
+	omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+	putc_ll('>');
+
+	am335x_barebox_entry(fdt);
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sram, bootinfo, r1, r2)
+{
+	am33xx_save_bootinfo((void *)bootinfo);
+
+	/*
+	 * Setup C environment, the board init code uses global variables.
+	 * Stackpointer has already been initialized by the ROM code.
+	 */
+	relocate_to_current_adr();
+	setup_c();
+
+	baltos_sram_init();
+}
+
+ENTRY_FUNCTION(start_am33xx_baltos_sdram, r0, r1, r2)
+{
+	void *fdt;
+
+	fdt = __dtb_am335x_baltos_minimal_start;
+
+	fdt -= get_runtime_offset();
+
+	am335x_barebox_entry(fdt);
+}