diff options
| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2019-10-14 14:18:59 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-10-14 15:28:34 +0200 |
| commit | 7105447cbcc0a7b1dc116836567b68483a86b50e (patch) | |
| tree | 3da46de9b8a8df69e369ea652618394cb7f461e9 /arch/arm/boards | |
| parent | 72e9046054e48fd1d9e77fc9276b3303fdcbd692 (diff) | |
| download | barebox-7105447cbcc0a7b1dc116836567b68483a86b50e.tar.gz barebox-7105447cbcc0a7b1dc116836567b68483a86b50e.tar.xz | |
ARM: at91: microchip-ksz9477-evb: add debug_ll UART
The EVB has the dbgu TX on PB31. Pinmux and set up the UART on it when
DEBUG_LL is enabled, so early barebox boot messages can be printed.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards')
| -rw-r--r-- | arch/arm/boards/microchip-ksz9477-evb/lowlevel.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c index 2a72ca321a..30a5760da6 100644 --- a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c +++ b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c @@ -1,7 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only AND BSD-1-Clause /* + * Copyright (C) 2014, Atmel Corporation * Copyright (C) 2018 Ahmad Fatoum, Pengutronix - * - * Under GPLv2 */ #include <common.h> @@ -9,8 +9,32 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> +#include <mach/at91_pmc_ll.h> #include <mach/hardware.h> +#include <mach/iomux.h> +#include <debug_ll.h> +#include <mach/at91_dbgu.h> + +/* PCK = 528MHz, MCK = 132MHz */ +#define MASTER_CLOCK 132000000 + +#define sama5d3_pmc_enable_periph_clock(clk) \ + at91_pmc_enable_periph_clock(IOMEM(SAMA5D3_BASE_PMC), clk) + +static void dbgu_init(void) +{ + void __iomem *pio = IOMEM(SAMA5D3_BASE_PIOB); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_PIOB); + + at91_mux_pio3_pin(pio, pin_to_mask(AT91_PIN_PB31), AT91_MUX_PERIPH_A, 0); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_DBGU); + at91_dbgu_setup_ll(IOMEM(AT91_BASE_DBGU1), MASTER_CLOCK, 115200); + + putc_ll('>'); +} extern char __dtb_z_at91_microchip_ksz9477_evb_start[]; @@ -22,6 +46,8 @@ ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2) arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE); + if (IS_ENABLED(CONFIG_DEBUG_LL)) + dbgu_init(); fdt = __dtb_z_at91_microchip_ksz9477_evb_start + get_runtime_offset(); |