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| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2022-01-14 09:21:41 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-01-17 14:30:21 +0100 |
| commit | 806ab9d9c7a08e41fe40f56ec0a8bd065200e2b8 (patch) | |
| tree | 071770fd8f228a3f1511a623419d45c22ade9b70 /arch/arm/boards | |
| parent | 4d2e00e041257195f09adb12e5c73ad8ffdb160c (diff) | |
| download | barebox-806ab9d9c7a08e41fe40f56ec0a8bd065200e2b8.tar.gz barebox-806ab9d9c7a08e41fe40f56ec0a8bd065200e2b8.tar.xz | |
ARM: rpi: set uart0-pl0110 clk to 48MHz
At least on RPi2 this clock is 48MHz. This issue was not visible,
becouse amba-pl011 driver was not reseting UART controller after
changing baudrate. So, clk settings was not updated for some time.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.barebox.org/20220114082141.302151-2-o.rempel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards')
| -rw-r--r-- | arch/arm/boards/raspberry-pi/rpi-common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c b/arch/arm/boards/raspberry-pi/rpi-common.c index 6c5df6fd69..2684bd5ed7 100644 --- a/arch/arm/boards/raspberry-pi/rpi-common.c +++ b/arch/arm/boards/raspberry-pi/rpi-common.c @@ -374,7 +374,7 @@ static int rpi_console_clock_init(void) clk = clk_fixed("apb_pclk", 0); clk_register_clkdev(clk, "apb_pclk", NULL); - clk = clk_fixed("uart0-pl0110", 3 * 1000 * 1000); + clk = clk_fixed("uart0-pl0110", 48 * 1000 * 1000); clk_register_clkdev(clk, NULL, "uart0-pl0110"); clkdev_add_physbase(clk, BCM2835_PL011_BASE, NULL); clkdev_add_physbase(clk, BCM2836_PL011_BASE, NULL); |