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authorSascha Hauer <s.hauer@pengutronix.de>2013-06-02 19:05:59 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-08-07 08:48:36 +0200
commit20e9bc17d4434f85cab228cc9ffa38dc514be63e (patch)
tree077c22aca3f2bf07b84a92649a26eb3cb575789f /arch/arm/cpu/lowlevel.S
parent72826e747442142a64b865ca6e4a8b3c88acd5d2 (diff)
downloadbarebox-20e9bc17d4434f85cab228cc9ffa38dc514be63e.tar.gz
barebox-20e9bc17d4434f85cab228cc9ffa38dc514be63e.tar.xz
ARM: Create an assembly arm_cpu_lowlevel_init function
To avoid the code duplication between the static inline C function and the assembly macro. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/lowlevel.S')
-rw-r--r--arch/arm/cpu/lowlevel.S39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
new file mode 100644
index 0000000000..307b447f33
--- /dev/null
+++ b/arch/arm/cpu/lowlevel.S
@@ -0,0 +1,39 @@
+#include <linux/linkage.h>
+#include <init.h>
+#include <asm/system.h>
+
+.section ".text_bare_init_","ax"
+ENTRY(arm_cpu_lowlevel_init)
+ /* set the cpu to SVC32 mode */
+ mrs r12, cpsr
+ bic r12, r12, #0x1f
+ orr r12, r12, #0xd3
+ msr cpsr, r12
+
+#if __LINUX_ARM_ARCH__ >= 7
+ isb
+#elif __LINUX_ARM_ARCH__ == 6
+ mcr p15, 0, r12, c7, c5, 4
+#endif
+
+ /* disable MMU stuff and caches */
+ mrc p15, 0, r12, c1, c0, 0
+ bic r12, r12 , #(CR_M | CR_C | CR_B)
+ bic r12, r12, #(CR_S | CR_R | CR_V)
+ orr r12, r12, #CR_I
+
+#if __LINUX_ARM_ARCH__ >= 6
+ orr r12, r12, #CR_U
+ bic r12, r12, #CR_A
+#else
+ orr r12, r12, #CR_A
+#endif
+
+#ifdef __ARMEB__
+ orr r12, r12, #CR_B
+#endif
+
+ mcr p15, 0, r12, c1, c0, 0
+
+ mov pc, lr
+ENDPROC(arm_cpu_lowlevel_init)