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authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-05-21 20:15:04 -0700
committerSascha Hauer <s.hauer@pengutronix.de>2018-05-22 09:13:55 +0200
commit6419c463d28ff4a48a1a9244c57644497f59ddb6 (patch)
treefe66bfea78adaf7faa94d776034a0072992da7a5 /arch/arm/cpu/mmu.c
parentfe1d2a3d2dff1b2d94c13bfb1aadbd185e16c589 (diff)
downloadbarebox-6419c463d28ff4a48a1a9244c57644497f59ddb6.tar.gz
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ARM: mmu: Make sure that address is 1M aligned in arm_create_pte()
If address passed arm_create_pte() is not 1M (PGDIR_SIZE) aligned, page table that is created will end up having unexpected mapping offset, breaking "1:1 mapping" assumption and leading to bugs that are not immediately obvious in their nature. To prevent this and because all of the callers already do said alignement in-place, move the alignment code to be a part of arm_create_pte(). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/mmu.c')
-rw-r--r--arch/arm/cpu/mmu.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 1713238adf..21394deb13 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -92,6 +92,8 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t flags)
u32 *table;
int i;
+ virt = ALIGN_DOWN(virt, PGDIR_SIZE);
+
table = xmemalign(PTRS_PER_PTE * sizeof(u32),
PTRS_PER_PTE * sizeof(u32));
@@ -291,8 +293,7 @@ static void create_vector_table(unsigned long adr)
vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
pr_debug("Creating vector table, virt = 0x%p, phys = 0x%08lx\n",
vectors, adr);
- exc = arm_create_pte(ALIGN_DOWN(adr, PGDIR_SIZE),
- pte_flags_uncached);
+ exc = arm_create_pte(adr, pte_flags_uncached);
idx = (adr & (PGDIR_SIZE - 1)) >> PAGE_SHIFT;
exc[idx] = (u32)vectors | PTE_TYPE_SMALL | pte_flags_cached;
}