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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2018-05-17 13:58:11 -0700 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-05-18 08:11:16 +0200 |
| commit | a23a0671935568862ca23bd638fd9418e3cd4bc8 (patch) | |
| tree | 163d26de6e1344cfd2f9ebe3e11086667cdad337 /arch/arm/cpu/mmu.c | |
| parent | f4f1dfacee4b9831c4cbc68ad48a1a99171ab91f (diff) | |
| download | barebox-a23a0671935568862ca23bd638fd9418e3cd4bc8.tar.gz barebox-a23a0671935568862ca23bd638fd9418e3cd4bc8.tar.xz | |
ARM: mmu: Make use of IS_ALIGNED in arm_mmu_remap_sdram()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/mmu.c')
| -rw-r--r-- | arch/arm/cpu/mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 9472013ca1..c70e9e782c 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -241,7 +241,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank) * We replace each 1MiB section in this range with second level page * tables, therefore we must have 1Mib aligment here. */ - if ((phys & (SZ_1M - 1)) || (bank->size & (SZ_1M - 1))) + if (!IS_ALIGNED(phys, SZ_1M) || !IS_ALIGNED(bank->size, SZ_1M)) return -EINVAL; ptes = xmemalign(PAGE_SIZE, num_ptes * sizeof(u32)); |