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authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-05-17 13:58:13 -0700
committerSascha Hauer <s.hauer@pengutronix.de>2018-05-18 08:11:16 +0200
commitc5770ee11c811c2751a98c1305749a78c326cdaa (patch)
treeaa00ea343cd8aa62113e93f1ce20d56df6dfd2a4 /arch/arm/cpu/mmu.c
parent03b32c37f191b5423835ec478ed9077e225491b5 (diff)
downloadbarebox-c5770ee11c811c2751a98c1305749a78c326cdaa.tar.gz
barebox-c5770ee11c811c2751a98c1305749a78c326cdaa.tar.xz
ARM: mmu: Introduce set_ttbr()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/mmu.c')
-rw-r--r--arch/arm/cpu/mmu.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index c70e9e782c..28732b7951 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -471,8 +471,7 @@ static int mmu_init(void)
pr_debug("ttb: 0x%p\n", ttb);
- /* Set the ttb register */
- asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
+ set_ttbr(ttb);
/* Set the Domain Access Control Register */
i = 0x3;