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authorJan Luebbe <jlu@pengutronix.de>2012-09-24 10:18:34 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2012-09-27 19:30:04 +0200
commitfaf7b7af6e51a33b88453821d792c89a84f72b1d (patch)
treebff70e6a71339e4d62e90c23ead1fc351effc89a /arch/arm/cpu/start-pbl.c
parentcc1602604d1654991f3ce02b664178b3e672afe7 (diff)
downloadbarebox-faf7b7af6e51a33b88453821d792c89a84f72b1d.tar.gz
barebox-faf7b7af6e51a33b88453821d792c89a84f72b1d.tar.xz
ARM: give boards control of the reset entry point
On some SoCs (for example AM35xx), the ROM bootloader passes useful information in r0 when jumping to barebox. To avoid overwriting this in the generic reset code, we introduce common_reset as a C function and as an assembler macro. This is then called form the reset entry point (either in common or in board code). This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/start-pbl.c')
-rw-r--r--arch/arm/cpu/start-pbl.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
index 932a3da9e2..823b9ccebc 100644
--- a/arch/arm/cpu/start-pbl.c
+++ b/arch/arm/cpu/start-pbl.c
@@ -41,6 +41,18 @@ void __naked __section(.text_head_entry) pbl_start(void)
barebox_arm_head();
}
+/*
+ * The actual reset vector. This code is position independent and usually
+ * does not run at the address it's linked at.
+ */
+#ifndef CONFIG_MACH_DO_LOWLEVEL_INIT
+void __naked __bare_init reset(void)
+{
+ common_reset();
+ board_init_lowlevel_return();
+}
+#endif
+
extern void *input_data;
extern void *input_data_end;