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authorAndrey Smirnov <andrew.smirnov@gmail.com>2016-01-10 16:58:11 -0800
committerSascha Hauer <s.hauer@pengutronix.de>2016-01-11 11:43:07 +0100
commit5e246885da8ee4dd93e2aeb455d7b8c203f81f02 (patch)
tree3c654319f4b1d297893277cd2bb6b46293151240 /arch/arm/cpu
parent78bca2870200731c92b8eb637d2710d3e90f2cec (diff)
downloadbarebox-5e246885da8ee4dd93e2aeb455d7b8c203f81f02.tar.gz
barebox-5e246885da8ee4dd93e2aeb455d7b8c203f81f02.tar.xz
ARM: mmu: Add VBAR setup
Add code to make sure that normal vector exception table, when it is used due to unavailability of the high vector table, was not re-mapped from 0x0 via VBAR by someone else before us. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/mmu.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 784221ce13..bc5325faba 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -302,6 +302,16 @@ static void vectors_init(void)
* live without being able to catch NULL pointer dereferences
*/
exc = arm_create_pte(0x0);
+
+ if (cpu_architecture() >= CPU_ARCH_ARMv7) {
+ /*
+ * ARMv7 CPUs allow to remap low vectors from
+ * 0x0 to an arbitrary address using VBAR
+ * register, so let's make sure we have it
+ * pointing to the correct address
+ */
+ set_vbar(0x0);
+ }
}
arm_fixup_vectors();