diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2013-02-11 18:01:30 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-02-11 21:08:24 +0100 |
| commit | 6061d3b3cb44a9b1fa478ef1d6c1ad9b4745223b (patch) | |
| tree | 5e5449a1a54257c7a8ca6e3c728d02abeaa35fc8 /arch/arm/cpu | |
| parent | 489f9470864996ced72d6937696d57265cf748ce (diff) | |
| download | barebox-6061d3b3cb44a9b1fa478ef1d6c1ad9b4745223b.tar.gz barebox-6061d3b3cb44a9b1fa478ef1d6c1ad9b4745223b.tar.xz | |
arm: move outercase to cpu.c as some SoC as the ux500 always need to flush the l2x0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/cpu.c | 22 | ||||
| -rw-r--r-- | arch/arm/cpu/mmu.c | 15 | ||||
| -rw-r--r-- | arch/arm/cpu/mmu.h | 6 |
3 files changed, 26 insertions, 17 deletions
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c index 7761f5cd4e..5f697d7916 100644 --- a/arch/arm/cpu/cpu.c +++ b/arch/arm/cpu/cpu.c @@ -34,6 +34,8 @@ #include <asm/cache.h> #include <asm/ptrace.h> +#include "mmu.h" + /** * Enable processor's instruction cache */ @@ -67,6 +69,24 @@ int icache_status(void) return (get_cr () & CR_I) != 0; } +/* + * SoC like the ux500 have the l2x0 always enable + * with or without MMU enable + */ +struct outer_cache_fns outer_cache; + +/* + * Clean and invalide caches, disable MMU + */ +void mmu_disable(void) +{ + if (outer_cache.disable) + outer_cache.disable(); + + __mmu_cache_flush(); + __mmu_cache_off(); +} + /** * Disable MMU and D-cache, flush caches * @return 0 (always) @@ -78,9 +98,7 @@ void arch_shutdown(void) { uint32_t r; -#ifdef CONFIG_MMU mmu_disable(); -#endif flush_icache(); /* * barebox normally does not use interrupts, but some functionalities diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 99f12b5ffb..219f50a478 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -325,21 +325,6 @@ static int mmu_init(void) } mmu_initcall(mmu_init); -struct outer_cache_fns outer_cache; - -/* - * Clean and invalide caches, disable MMU - */ -void mmu_disable(void) -{ - - if (outer_cache.disable) - outer_cache.disable(); - - __mmu_cache_flush(); - __mmu_cache_off(); -} - void *dma_alloc_coherent(size_t size) { void *ret; diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h index 618968bc82..79ebc80d7d 100644 --- a/arch/arm/cpu/mmu.h +++ b/arch/arm/cpu/mmu.h @@ -1,8 +1,14 @@ #ifndef __ARM_MMU_H #define __ARM_MMU_H +#ifdef CONFIG_MMU void __mmu_cache_on(void); void __mmu_cache_off(void); void __mmu_cache_flush(void); +#else +static inline void __mmu_cache_on(void) {} +static inline void __mmu_cache_off(void) {} +static inline void __mmu_cache_flush(void) {} +#endif #endif /* __ARM_MMU_H */ |