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authorSascha Hauer <s.hauer@pengutronix.de>2012-10-03 21:06:33 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-03-07 12:38:01 +0100
commitb08e08506b9752d3768e42d075283f91d2ed5180 (patch)
tree8b3b741d33508cea7d6240463894b69ae9eb2c42 /arch/arm/cpu
parent019712525a9a47037af7c13c257d2177f080ae7e (diff)
downloadbarebox-b08e08506b9752d3768e42d075283f91d2ed5180.tar.gz
barebox-b08e08506b9752d3768e42d075283f91d2ed5180.tar.xz
ARN: fixup vector addresses for relocatable binaries
With relocatable binaries the vector addresses cannot be supplied by the linker. This adds support for fixing them up during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/exceptions.S55
-rw-r--r--arch/arm/cpu/mmu.c2
2 files changed, 51 insertions, 6 deletions
diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S
index 4185bd1d30..167c8d1fe2 100644
--- a/arch/arm/cpu/exceptions.S
+++ b/arch/arm/cpu/exceptions.S
@@ -1,4 +1,5 @@
#include <config.h>
+#include <linux/linkage.h>
#include <asm-generic/memory_layout.h>
/*
@@ -137,16 +138,58 @@ fiq:
bad_save_user_regs
bl do_fiq
+#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_ARM_EXCEPTIONS)
+/*
+ * With relocatable binary support the runtime exception vectors do not match
+ * the addresses in the binary. We have to fix them up during runtime
+ */
+ENTRY(arm_fixup_vectors)
+ ldr r0, =undefined_instruction
+ ldr r1, =_undefined_instruction
+ str r0, [r1]
+ ldr r0, =software_interrupt
+ ldr r1, =_software_interrupt
+ str r0, [r1]
+ ldr r0, =prefetch_abort
+ ldr r1, =_prefetch_abort
+ str r0, [r1]
+ ldr r0, =data_abort
+ ldr r1, =_data_abort
+ str r0, [r1]
+ ldr r0, =irq
+ ldr r1, =_irq
+ str r0, [r1]
+ ldr r0, =fiq
+ ldr r1, =_fiq
+ str r0, [r1]
+ bx lr
+ENDPROC(arm_fixup_vectors)
+#endif
+
.section .text_exceptions
+.globl extable
+extable:
1: b 1b /* barebox_arm_reset_vector */
#ifdef CONFIG_ARM_EXCEPTIONS
- ldr pc, =undefined_instruction /* undefined instruction */
- ldr pc, =software_interrupt /* software interrupt (SWI) */
- ldr pc, =prefetch_abort /* prefetch abort */
- ldr pc, =data_abort /* data abort */
+ ldr pc, _undefined_instruction /* undefined instruction */
+ ldr pc, _software_interrupt /* software interrupt (SWI) */
+ ldr pc, _prefetch_abort /* prefetch abort */
+ ldr pc, _data_abort /* data abort */
1: b 1b /* (reserved) */
- ldr pc, =irq /* irq (interrupt) */
- ldr pc, =fiq /* fiq (fast interrupt) */
+ ldr pc, _irq /* irq (interrupt) */
+ ldr pc, _fiq /* fiq (fast interrupt) */
+.globl _undefined_instruction
+_undefined_instruction: .word undefined_instruction
+.globl _software_interrupt
+_software_interrupt: .word software_interrupt
+.globl _prefetch_abort
+_prefetch_abort: .word prefetch_abort
+.globl _data_abort
+_data_abort: .word data_abort
+.globl _irq
+_irq: .word irq
+.globl _fiq
+_fiq: .word fiq
#else
1: b 1b /* undefined instruction */
1: b 1b /* software interrupt (SWI) */
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 219f50a478..34fe5c3515 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -247,6 +247,8 @@ static void vectors_init(void)
exc = arm_create_pte(0x0);
}
+ arm_fixup_vectors();
+
vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
memset(vectors, 0, PAGE_SIZE);
memcpy(vectors, __exceptions_start, __exceptions_stop - __exceptions_start);