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authorAlexander Shiyan <shc_work@mail.ru>2013-02-08 14:02:20 +0400
committerSascha Hauer <s.hauer@pengutronix.de>2013-02-11 09:26:35 +0100
commitcaf066102eb048a0b749de16d31d837dd49be8e3 (patch)
treea456d97908e84a0461d57015483c3860eca639ca /arch/arm/cpu
parentc49819d9034afa3cef7a150afb8d44c9dada09b0 (diff)
downloadbarebox-caf066102eb048a0b749de16d31d837dd49be8e3.tar.gz
barebox-caf066102eb048a0b749de16d31d837dd49be8e3.tar.xz
ARM: mmu: Clear unpredictable bits for translation table
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/mmu.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 73dd0d397b..99f12b5ffb 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -279,6 +279,9 @@ static int mmu_init(void)
if (get_cr() & CR_M) {
asm volatile ("mrc p15,0,%0,c2,c0,0" : "=r"(ttb));
+ /* Clear unpredictable bits [13:0] */
+ ttb = (unsigned long *)((unsigned long)ttb & ~0x3fff);
+
if (!request_sdram_region("ttb", (unsigned long)ttb, SZ_16K))
pr_err("Error: Can't request SDRAM region for ttb\n");
} else {