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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-03-30 15:24:43 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-03-31 10:00:35 +0200 |
commit | dcc99365849cc5baa2d0169bc2da97dbe64c3903 (patch) | |
tree | a854d6b83cca02e8f7fc5a65b516aca230d8b6e7 /arch/arm/cpu | |
parent | 3201b9228949fc4c1d2e577ce2e8a152a25260a4 (diff) | |
download | barebox-dcc99365849cc5baa2d0169bc2da97dbe64c3903.tar.gz barebox-dcc99365849cc5baa2d0169bc2da97dbe64c3903.tar.xz |
ARM64: Setup vectors in all lower execption levels
barebox on ARM64 often changes the exception level when loading a TF-A
or other secure monitor firmware. Make sure we have setup the vector
table in the exception level we then end up in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/interrupts_64.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/arm/cpu/interrupts_64.c b/arch/arm/cpu/interrupts_64.c index e8475d2e47..baccf47808 100644 --- a/arch/arm/cpu/interrupts_64.c +++ b/arch/arm/cpu/interrupts_64.c @@ -194,15 +194,22 @@ extern unsigned long vectors; static int aarch64_init_vectors(void) { - unsigned int el; - - el = current_el(); - if (el == 1) - asm volatile("msr vbar_el1, %0" : : "r" (&vectors) : "cc"); - else if (el == 2) - asm volatile("msr vbar_el2, %0" : : "r" (&vectors) : "cc"); - else - asm volatile("msr vbar_el3, %0" : : "r" (&vectors) : "cc"); + unsigned int el; + + el = current_el(); + switch (el) { + case 3: + asm volatile("msr vbar_el3, %0" : : "r" (&vectors) : "cc"); + /* Fall through */ + case 2: + asm volatile("msr vbar_el2, %0" : : "r" (&vectors) : "cc"); + /* Fall through */ + case 1: + asm volatile("msr vbar_el1, %0" : : "r" (&vectors) : "cc"); + /* Fall through */ + default: + break; + } return 0; } |