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author | Stefan Christ <s.christ@phytec.de> | 2016-04-27 12:04:49 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-05-02 08:14:15 +0200 |
commit | 95e1132633a5b8a4c5f6b8a150bbc6f01f820fa0 (patch) | |
tree | ad32fddfe4ddbf374df8873fc3f3fe46bbe06662 /arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | |
parent | a6ec1b51a9b8146a5bf4e049306fc993d4640ed0 (diff) | |
download | barebox-95e1132633a5b8a4c5f6b8a150bbc6f01f820fa0.tar.gz barebox-95e1132633a5b8a4c5f6b8a150bbc6f01f820fa0.tar.xz |
ARM: phytec-som-imx6: add NOR for phycore-imx6 emmc
Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.
Furthermore add an extra 'status = "disabled"' in the flash node. It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi')
-rw-r--r-- | arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi index 2a975d103e..ed0068826c 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi @@ -46,6 +46,7 @@ compatible = "m25p80"; spi-max-frequency = <20000000>; reg = <0>; + status = "disabled"; #address-cells = <1>; #size-cells = <1>; |