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author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2015-08-14 10:36:42 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-08-19 15:56:29 +0200 |
commit | 8c2f1929c71bb590dcc3d1ec970f5f7958afd7aa (patch) | |
tree | 3184673f3ce1d4ede9a2a7d8115e62690928bbdd /arch/arm/dts/socfpga_cyclone5.dtsi | |
parent | 3086fd8bb43ae6350d057e8a1534cfcc2f7f7558 (diff) | |
download | barebox-8c2f1929c71bb590dcc3d1ec970f5f7958afd7aa.tar.gz barebox-8c2f1929c71bb590dcc3d1ec970f5f7958afd7aa.tar.xz |
ARM: dts: remove most of socfpga barebox-specific dt code
Instead of using internal devicetree files, use the official ones from
/dts/src/arm.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5.dtsi')
-rw-r--r-- | arch/arm/dts/socfpga_cyclone5.dtsi | 78 |
1 files changed, 0 insertions, 78 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi deleted file mode 100644 index ee2ec6c61c..0000000000 --- a/arch/arm/dts/socfpga_cyclone5.dtsi +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (C) 2012 Altera Corporation <www.altera.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/dts-v1/; -/include/ "socfpga.dtsi" - -/ { - soc { - clkmgr@ffd04000 { - clocks { - osc1 { - clock-frequency = <25000000>; - }; - }; - }; - - ethernet@ff702000 { - phy-mode = "rgmii"; - snps,phy-addr = <0xffffffff>; /* probe for phy addr */ - status = "okay"; - }; - - dwmmc0@ff704000 { - num-slots = <1>; - supports-highspeed; - broken-cd; - altr,sysmgr = <&system_mgr>; - altr,dw-mshc-sdr-timing = <0 3>; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - - timer@ffc08000 { - clock-frequency = <100000000>; - }; - - timer@ffc09000 { - clock-frequency = <100000000>; - }; - - timer@ffd00000 { - clock-frequency = <25000000>; - }; - - timer@ffd01000 { - clock-frequency = <25000000>; - }; - - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - - sysmgr@ffd08000 { - cpu1-start-addr = <0xffd080c4>; - }; - }; -}; |