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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2015-02-23 10:15:05 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2015-03-02 07:43:25 +0100
commitfbba349cd54b84d3050e6593541ea97cacfe022b (patch)
tree51159b1951b8479a6fe8715c6020b4487786421d /arch/arm/dts/socfpga_cyclone5_socdk.dts
parent093dd1e7befa01aff30c5849994e4195331812fb (diff)
downloadbarebox-fbba349cd54b84d3050e6593541ea97cacfe022b.tar.gz
barebox-fbba349cd54b84d3050e6593541ea97cacfe022b.tar.xz
ARM: socfpga: add Altera SoCFPGA Development Kit support
Add support for the Altera SoCFPGA Development Kit. The setup is based on the GHRD from Altera. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5_socdk.dts')
-rw-r--r--arch/arm/dts/socfpga_cyclone5_socdk.dts63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
new file mode 100644
index 0000000000..025d07c18c
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/include/ "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Altera SOCFPGA Cyclone V SoC Development Kit";
+ compatible = "altr,socdk", "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ };
+
+ memory {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x0>;
+ };
+
+ aliases {
+ ethernet0 = &gmac1;
+ };
+
+ regulator_3_3v: 3-3-v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&gmac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <2600>;
+ rxdv-skew-ps = <0>;
+ rxc-skew-ps = <2000>;
+};
+
+&mmc {
+ cd-gpios = <&gpio1 18 0>;
+ vmmc-supply = <&regulator_3_3v>;
+ vqmmc-supply = <&regulator_3_3v>;
+};